Internal voltage converter for low operating voltage...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S536000

Reexamination Certificate

active

06271718

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a voltage regulator circuit of a semiconductor memory device that operates at a low voltage.
2. Description of the Prior Art
The designed operating voltages of semiconductor memory devices are becoming lower, in order to increase integration and to decrease power consumption. Accordingly, increasingly lower external voltages are used to operate the devices, but that is not always enough. Thus voltage regulators are also used to convert the external voltage to the lower operating voltage of the device.
In the 1994 IEEE Symposium on the Low Electricity Electronical Engineering, a paper titled “Low-dropout On-chip Voltage Regulator for Low-Power Circuits” teaches to use a NMOS driver in the regulator of the semiconductor memory device. The paper teaches to use a boosting circuit to increase the voltage level of the control signal applied to the gate of the NMOS driver, as well as a clock signal generating circuit to operate the boosting circuit.
A problem is that, as operating voltages decrease further, a high external voltage is applied to the regulator can destroy the transistors of the boosting circuit and the clock signal generating circuit. The reason is that high voltage differences will be applied across the junctions of the transistors.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a voltage regulator for a semiconductor memory device that can withstand an external voltage that is too high. The object is accomplished by the internal voltage converter of the present invention.
The internal voltage converter comprises a voltage down converter that receives the external voltage and provides an intermediate voltage lower than the external voltage. The regulator further comprises a timing pulse generator that receives the intermediate voltage and generates a timing signal. Since not powered directly by the higher external voltage, the timing pulse generator is thus protected. The timing pulse generator is preferably made by a clock signal generator that receives the intermediate voltage and produces a clock signal, and by a timing controller that receives the clock signal and produces the timing signal. Since the timing controller is powered by the lower intermediate voltage, the timing signal is of a lower level.
The regulator of the present invention further comprises a booster that receives the timing signal and the external voltage. The booster outputs a boosted voltage that is of a lower level than in the prior art. The regulator also includes a voltage source that receives the boosted voltage and the external voltage, and outputs the device's internal operating voltage for operating it. Since the boosted voltage is of a lower level, the voltage source is thus protected.
The voltage down converter can be a voltage source made as is known in the art. The voltage down converter is preferably made by a PMOS driver that receives the external voltage and outputs the intermediate voltage, and a second differential comparator that receives the external voltage and controls the PMOS driver. The second differential comparator senses the intermediate voltage and compares it to a reference voltage which is advantageously the same voltage reference used with the voltage source. In that case the intermediate voltage will be equal to the device's internal operating voltage.
Since the clock signal generator receives a stable voltage, the clock signal will be of stable frequency and amplitude. Further, the timing pulses produced by the timing controller will also be of stable frequency and amplitude. These and other features and advantages of the present invention will be better understood by the following Detailed Description and Drawings in which:


REFERENCES:
patent: 5347170 (1994-09-01), Hayakawa et al.
H.J. Shin et al., “Low-Dropout On-Chip Voltage Regulator for Low-Power Circuits,” 1994 IEEE, pp. 76-77.

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