Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
1998-11-17
2001-09-04
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S778000
Reexamination Certificate
active
06285079
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device to be mounted on a motherboard, and more particularly, to a ball-grid-array resin packaged semiconductor device whose package size is substantially equal in size to a semiconductor chip (hereinafter sometimes referred to simply as a “chip”).
2. Background Art
A ball grid array (hereinafter sometimes abbreviated to “BGA”) of electrodes is suitable for constituting a compact chip-size package (hereinafter sometimes abbreviated to “CSP”) in which solder bumps of electrodes are arranged in a matrix on the major surface of an insulating substrate having a semiconductor chip mounted on the opposite side thereof. A package employing a ball grid array (BGA) and a compact chip-size package (CSP) in combination will be hereinafter referred to simply as a “BGA/CSP structure.” Recently, this BGA/CSP structure has often been used for high-density packaging of LSIs for use in a portable cellular phone or high-density packaging of DRAMs for use in a personal computer.
A motherboard is usually made of glass epoxy base material, and works to electrically connects a chip with another semiconductor elements or a semiconductor devices, or with other electronic components such as capacitors or resistors, to thereby constitute on-board circuitry. A chip has a coefficient of volume expansion of about 3 to 4×10
−6
/° C. In contrast, a motherboard has a coefficient of thermal expansion of about 20 to 60×10
−6
/° C.
As described above, since there is a significant difference in coefficient of thermal expansion between the chip and the motherboard, the BGA/CSP structure is required to assume the task of alleviating the stress exerted on connected portions of electrode bumps to be used as external electrodes for mounting purposes. This stress alleviation problem is described in, e.g., (1) Japanese Patent Application Laid-open No. 5-129366, (2) Japanese Patent Application Laid-open No. 7-321157, and (3) Japanese Patent Application Laid-open No. 8-102473.
In the disclosure of the Publication (1), a plurality of first bumps are arranged on the side of a polyimide TAB (Tape Automated Bonding) tape facing a chip, and a plurality of second bumps to be used as external electrodes for mounting purposes are arranged in a BGA on the side of the polyimide TAB tape facing the motherboard. The first and second bumps are connected together by means of a copper foil wiring layer laminated to double-sided tapes. Electrodes of the chip, mounted face-down on the first bumps, are electrically connected to electrode pads of the motherboard by way of the copper foil wiring layer and the second bumps of the TAB tape. In this example, the electrode pads of the motherboard are made compact so as to substantially fit into a projected area of the chip. The stress exerted on each of the bumps interposed between the chip and the motherboard is alleviated by means of the flexibility of the TAB tape, by reduction in the temperature required for soldering bumps, and by elimination of plastic-packaging of a chip. However, since the chip is not plastic-packaged or resin-packaged, the chip has the drawback of inferior mechanical strength or inferior weather resistance.
In the disclosure of the Publication (2), electrodes of a chip are directly connected to a wiring layer of an insulating film facing the chip. The electrodes and the wiring layer, which face each other, are bonded together by means of an adhesive tape and packaging. The chip electrodes are electrically connected to electrode pads of the motherboard by way of external electrodes for mounting purposes provided on the side of the insulating film facing the motherboard. The stress exerted on electrode bumps is alleviated by increasing the flexibility of the insulating film. Even when the chip is plastic-packaged, the resultant package size is substantially equal to the chip.
Publication (2) further describes another example in which the second bumps and the wiring layer are formed in a peripheral area which is greater in area than the chip and which is provided on the side of the insulating film facing the motherboard. In still another example described in Publication (2), the reverse surface of the chip is not sealed with resin, so as to permit direct attachment of a heat sink. However, such a package deviates from the CSP and becomes bulky.
In the disclosure of the Publication (3), a noise shielding layer and ground/power bumps are provided in an area greater than the chip size described in the Publication (2) so as to surround chip electrodes and signal electrode bumps of an insulating film. The noise shielding layer and the ground/power bumps are connected to ground/power electrodes of the chip electrodes, thereby reducing noise. However, even when the noise shielding layer is provided in the area greater than the chip size, as a natural consequence a shielding effect is weak.
As mentioned above, when a semiconductor device is made compact by arranging electrode bumps for mounting purposes into a BGA, there arise several other problems in addition to alleviation of the stress exerted on electrode bumps.
First, a wiring pattern connecting electrode bumps provided in the vicinity of an array grid pattern to corresponding chip electrodes inevitably becomes longer. If the number of electrode bumps increases as a result of an increase in the number of pins, pitches between electrode bumps become smaller, which in turn renders the wiring pattern thinner. In a case where an attempt is made to satisfy both an increase in the number of pins and packaging of a semiconductor device into a small area, the wiring pattern becomes longer and thinner. In any event, the wiring pattern becomes more prone to pick up noise.
In a chip for use with microwaves of frequency ranging from hundreds of mega-hertz to giga-hertz, as well as in a chip for use in a portable cellular phone or a personal computer, not only external noise but also cross-talk among signal electrode bumps must be reduced. The higher the packaging density, the bigger the problem of noise or cross-talk.
In outer space or an artificial environment in which passage of incoming &agr;-rays or neutrons is not negligible, there is an increase in the necessity of reliably preventing soft-error failures, which would otherwise temporarily cause a faulty operation of the chip. Under these circumstances, the higher a packaging density, the more serious the prevention of soft-error failures.
Further, as the degree of integration of a semiconductor chip becomes higher, there is a growing necessity of efficiently dissipating to the outside the heat produced at the time of operation the chip.
The present invention has been conceived to solve the previously-mentioned problems, and a first object of the present invention is to provide a BGA/CSP semiconductor device for packaging purpose which alleviates the stress exerted on electrode bumps and is prevented from picking up noise.
A second object of the present invention is to provide a BGA/CSP type semiconductor device which alleviates the stress exerted on electrode bumps, is prevented from picking up noise, and prevents cross-talk between the semiconductor device and external signals.
A third object of the present invention is to provide a BGA/CSP type semiconductor device which alleviates the stress exerted on electrode bumps, is prevented from picking up noise, prevents cross-talk between the semiconductor device and external signals, and prevents cross-talk among electrode bumps.
A fourth object of the present invention is to provide a BGA/CSP type semiconductor device which alleviates the stress exerted on electrode bumps, is prevented from picking up noise, prevents cross-talk between the semiconductor device and external signals, prevents cross-talk among electrode bumps, and improves the ability to dissipate heat.
A fifth object of the present invention is to provide a BGA/CSP type semiconductor device which alleviates the stress exerted on electrode bu
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Potter Roy
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