Patent
1997-09-05
1999-05-11
Shin, Christopher B.
395864, 395732, G06F13/18
Patent
active
059037768
ABSTRACT:
A single queuing structure enqueues requests of multiple priorities. The queuing structure is especially well adapted for use with requests that are part of AGP operations. For instance, the queuing structure may enqueue low priority read requests, high priority read requests, low priority write requests, and high priority write requests. The queuing structure may be logically partitioned into logical sub-queues where each sub-queues is associated with requests of a given type and a given priority. Each of the logical sub-queues may be configured to operate in a first-in-first-out (FIFO) fashion. Separate pointers may be maintained for identifying the bottom of each of the logical sub-queues within the single queuing structure.
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"Accelerated Grahics Port Interface Specification," Intel Corporation, 1996, pp. 1-151.
Micron Electronics Inc.
Shin Christopher B.
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