Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
1998-07-31
2001-01-16
Hafiz, Tariq R. (Department: 2762)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
Reexamination Certificate
active
06175955
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to test and measurement instruments and more particularly to a method for retrieving selected data values in a processor using a logic analyzer and data visibility macros.
BACKGROUND OF THE INVENTION
As processors have become more and more complex, the data carried by the bus has become further removed from the actual executed code inside the processor. Thus, a logic analyzer that is used to collect bus activity must differentiate between instructions that were actually executed and those instructions that were not. This task is difficult, at best. With the introduction of instruction and data caches in today's processors, tracking code execution at the bus seems illogical.
However, using a software trace technique facilitates the debugging of complex, target processors. Software trace provides the systems developer high-level source code that is correlated to a real-time trace acquired by a logic analyzer. Typically, the logic analyzer will use a disassembler to interpret which bus cycles contain code information. A symbol database is used to correlate the actual source code to the code addresses seen on the target bus. One limitation of this technique is that data operations that occur internally to the processor are not captured by the logic analyzer. Providing the developer with the relevant data operations would enhance the developer's knowledge of the processor during the debug stage of development.
Logic analyzers and related techniques for software debugging are disclosed in U.S. Pat. No. 4,373,193 for LOGIC STATE ANALYZER of George A. Haag, O. Douglas Fogg, Gordon A. Greenley, Steve A. Shepard and F. Duncan Terry; U.S. Pat. No. 4,720,778 for SOFTWARE DEBUGGING ANALYZER of Kevin M. Hall and Daniel A. Schmelzer; U.S. Pat. No. 5,450,586 for SYSTEM FOR ANALYZING AND DEBUGGING EMBEDDED SOFTWARE THROUGH DYNAMIC AND INTERACTIVE USE OF CODE MARKERS of Eric J. Kuzara, Andrew J. Blasciak and Greg S. Parets; and U.S. Pat. No. 5,737,520 for METHOD AND APPARATUS FOR CORRELATING LOGIC ANALYZER STATE CAPTURE DATA WITH ASSOCIATED APPLICATION DATA STRUCTURES of Robert D. Gronlund, Brian A. Willette and William M. Zevin. The foregoing patents are commonly assigned to Hewlett-Packard Company and are hereby incorporated herein by reference for all that they disclose and teach.
SUMMARY OF THE INVENTION
The present invention provides a method for retrieving selected data values in a processor using a logic analyzer and data visibility macros. A data visibility macro is essentially a code marker, the difference being that a data visibility macro is used by the logic analyzer to retrieve data value information.
The present method comprises the steps of inserting a data visibility macro into software code that is resident in the microprocessor, compiling the code, writing the selected data values to an external bus, and using the logic analyzer to retrieve and display the data values. Each data visibility macro comprises a C code source file and a header file. The source file reserves an array of memory to which the data values are written. The header file defines the macros that writes the selected data values.
REFERENCES:
patent: 5450586 (1995-09-01), Kuzara et al.
patent: 5737520 (1998-04-01), Gronlund et al.
patent: 5968181 (1999-10-01), Tomioka
Auslander et al. Fast, Effective Dynamic Compilation. ACM. pp. 149-159, May, 1996.
Mukherjea et al. Applying Algorithm Animation Techniques for Program Tracing, Debugging, and Understanding. ACM. pp. 456-465, 1993.
Copperman. Debugging Optimized Code Without Being Misled. ACM. pp. 387-427, 1994.
Embedded Systems Programming-Aug. 1997; “Debugging With Real-Time Trace” by Dan Ojennes; pp. 50-58.
Hewlett-Packard Journal-Mar. 1983; “A Modular Logic Timing Analyzer For The 64000 System” by Joel A. Zellmer, John E. Hanna, and David L. Neuder; pp. 23-30.
Hewlett-Packard Journal-Feb. 1984; “New Software Increases Capabilities of Logit Timing Analyzer” by David L. Neuder; pp. 32-38.
Hewlett-Packard Journal-Apr. 1991; “A Test Verification Tool For C and C++Programs” by David L. Neuder; pp. 83-92.
Hewlett-Packard Journal-Apr. 1993; “Software Performance Analysis Of Real-Time Embedded Systems” by Andrew J. Blasciak, David L. Neuder, and Arnold S. Berger; pp. 107-115.
Neuder David L.
Ojennes Daniel James
Agilent Technologies
Hafiz Tariq R.
Murphy Patrick J.
Zhen Wei
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