Still-image video signal processing circuit

Details Still-image video signal processing circuit Still-image video signal processing circuit

1991-05-31

1993-11-16

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358140, H04N 712

Patent

active

052628574

ABSTRACT:
A still-image video signal processing circuit for a MUSE decoder has a pair of frame memories for producing first digital video signals which vary from each other by a delay time difference corresponding to a period of two frames, and second digital video signals which vary from each other by a delay time difference corresponding to a period of one frame, from a MUSE signal, i.e., a three-dimensionally sub-sampled input digital video signal, and a noise removing circuit for removing noise from the input digital video signal with the first digital video signal supplied thereto. An interframe interpolating circuit interpolates the input digital video signal between frames with the second digital video signals supplied thereto, and an interfield interpolating circuit interpolates the input digital video signal with the second digital video signals supplied thereto from the frame memories.

REFERENCES:
patent: 5128759 (1992-07-01), Matsunaga

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