Electricity: electrical systems and devices – Safety and protection of systems and devices – Voltage regulator protective circuits
Reexamination Certificate
2000-09-06
2001-06-12
Sterrett, Jeffrey (Department: 2838)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Voltage regulator protective circuits
C323S274000, C323S277000, C323S908000
Reexamination Certificate
active
06246555
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
This invention relates to protection of output devices, particularly to the output device of a voltage regulator, and output driver amplifier.
(2) Brief Description of the Related Art
Large output devices are commonly found in voltage regulator, output driver amplifier etc. Large surge current are produced especially during power supply powering up, as well as by power up/down control bit.
In a widely used regulated power supply as shown in
FIG. 1
, this surge current is particularly severe. In this operation, an unregulated supply voltage Vsup is applied through a p-channel MOS pass transistor M
1
A to a load Rload in parallel with a load capacitor Cload with a regulated output voltage Vout. The output voltage or a fraction of the output voltage is compared with a reference voltage Vref in a differential amplifier AMP. The output voltage of the differential amplifier Vg is used to control the gate of the pass transistor M
1
A until the regulated output voltage Vout is equal to the reference Vref. For proper operation, the output voltage Vout is applied to the inverting input of the differential amplifier AMP and the reference voltage Vref is applied to the non-inverting input of the differential amplifier AMP.
During the time when the power supply is suddenly applied (ramps up), the reference voltages appears at the non-inverting input of AMP before Vout appears at the inverting input of AMP due to the load capacitor. Thus, the gate voltage Vg of M
1
A is pulled down to cause a heavy current to flow in M
1
A. Such a surge current may damage the transistor.
The first prior art to reduce the surge current is to use diodes to clamp the gate voltage (
FIG. 1
, node Vg). The two pMOS transistors Md
1
and Md
2
are connected as diodes to clamp Vg to approxinately two threshold voltages below the supply voltage Vsup. However, it is difficult to obtain effective diode clamp that has the right trigger voltage and low leakage current during off state.
The second prior art is to control the node Vg change slowly during transient events as shown in FIG.
1
. The Delay block generates a very slow delay ramp signal to slowly turn on the gate node Vg of the M
1
A, so as to try to reduce the large transient current. The result is not satisfactory due to the large output device current produced in response to small voltage change in Vg. Also, a too slow or weak control of the Vg conflicts with the control by the AMP amplifier.
SUMMARY OF THE INVENTION
An object of this invention is to precisely control the surge current of the large output device during transient operations. Another object of this invention is to prevent damage to an output transistor or an integrated circuit of a regulated power supply.
These objects are achieved by limiting the current through the pass transistor during the transient period. After an output voltage has been derived at the output voltage with the limited current through the pass transistor, the circuit begins to function as a regulated power supply
REFERENCES:
patent: 3579039 (1971-05-01), Damon
patent: 3924158 (1975-12-01), Farnsworth
patent: 4338646 (1982-07-01), Davis et al.
patent: 5010293 (1991-04-01), Ellersick
patent: 5343141 (1994-08-01), Metro et al.
patent: 5637992 (1997-06-01), Edwards
patent: 5822203 (1998-10-01), Peron
patent: 5986484 (1999-11-01), Kimata
patent: 6160387 (2000-12-01), Moraghan
Lin Patent Agent H. C.
Prominenet Communications Inc.
Sterrett Jeffrey
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