Method of manufacturing a CCD sensor with a deep well

Details Method of manufacturing a CCD sensor with a deep well Method of manufacturing a CCD sensor with a deep well

1994-08-11

2001-08-14

Chaudhari, Chandra (Department: 2813)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S530000

Reexamination Certificate

active

06274401

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a method of manufacturing a semiconductor device and, more particularly, to a semiconductor device manufacturing method for forming wells which are indispensable to a CCD (charge coupled device), a CMOSIC (complementary metal oxide semiconductor integrated circuit) or the like.
2. Description of the Prior Art
FIGS. 1A through 1C
are cross-sectional views showing examples of respective semiconductor devices having wells.
FIG. 1A
shows an example of a CCD image sensor and
FIGS. 1B
,
1
C show examples of CMOSICs, respectively.
FIG. 1C
shows the example of CMOSIC in which an isolating n-type well is formed in order to isolate a p-type well and an n-type well when a negative bias voltage is applied to a p-type semiconductor substrate. Throughout
FIGS. 1A
to
1
C, reference symbols a and b depict p-type wells and reference symbol c depicts an n-type well. Generally, it is known that the wells a, b and c are formed by selectively diffusing impurities on a surface portion of the semiconductor substrate.
Since the wells are formed by the diffusion of impurities in the prior art, it takes an extremely long time to form wells. That is, a diffusion time of several 10s of hours calculated in terms of 1100° C. is required. If such long diffusion time is required as described above, then productivity of semiconductor device is naturally lowered, which becomes a factor for hindering semiconductor devices from being produced inexpensively. Also, impurities are diffused in the lateral direction and hence devices cannot be miniaturized like micro-devices. Further, there is the risk that the core tube, wafer holding boat or the like will be deformed by heat. Furthermore, there is the risk such that a metal in a high temperature heater will be diffused into the core tube to contaminate the surface portion of the semiconductor wafer.
OBJECTS AND SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a method of manufacturing a semiconductor device in which the aforesaid shortcomings and disadvantages of the prior art can be eliminated.
It is an object of the present invention to provide a method of manufacturing a semiconductor device in which a heat treatment time for forming wells can be reduced.
It is another object of the present invention to provide a method of manufacturing a semiconductor device in which productivity of semiconductor device can be improved.
It is still another object of the present invention to provide a method of manufacturing a semiconductor device in which semiconductor devices can be produced inexpensively.
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device in which ion implantation of impurities is carried out at energy of 0.7 to 16 MeV and the impurities are treated by heat treatment during a period in which a diffusion time calculated in terms of 1100° C. is within 10 hours to thereby form wells.
According to the method of manufacturing a semiconductor device of the present invention, since impurities are implanted at very large energy of 0.7 to 16 MeV and then diffused, even deep wells can be formed during a heat treatment time within 10 hours which is considerably shorter than that of the prior art.
The above and other objects, features, and advantages of the present invention will become apparent from the following detailed description of an illustrative embodiment thereof to be read in conjunction with the accompanying drawings, in which like reference numerals are used to identify the same or similar parts in the several views.


REFERENCES:
patent: 4729964 (1988-03-01), Natsuaki
patent: 5134301 (1992-07-01), Kamata et al.
patent: 5141882 (1992-08-01), Komori et al.
patent: 5160996 (1992-11-01), Odanaka
patent: 5238860 (1993-08-01), Sawada et al.
Pramanik et al., “MeV Implantation for Silicon Device Fabrication”, Solid State Technology, May 1984, pp. 211-216.

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