Pulse or digital communications – Systems using alternating or pulsating current – Plural channels for transmission of a single pulse train
Reexamination Certificate
1999-10-22
2001-08-21
Pham, Chi (Department: 2631)
Pulse or digital communications
Systems using alternating or pulsating current
Plural channels for transmission of a single pulse train
C375S222000
Reexamination Certificate
active
06278741
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to timing recovery in a modem receiver and, in particular, to symbol timing recovery for a quadrature amplitude modulation (QAM) modem receiver.
2. Discussion of the Prior Art
The basic function of any communications system is to transmit information over a communication channel from an information source to a destination as fast and as accurately as possible.
There are two general types of information sources. Analog sources, such as a telephone microphone, or an analog cable system, generate a continuous signal. Digital source, such as a digital data processing system, generates a signal that consists of a sequence of pulses.
To permit the transmission of digital pulse streams over an analog channel, it is necessary to utilize the digital data pulses to modulate a carrier waveform that is compatible with the analog transmission channel.
The MOdulator-DEModulator, or MODEM, includes the capability not only to modulate transmitted signals, but also to demodulate received signals to recover the digital data from the modulated analog carrier waveform.
The received signal is typically contaminated by two types of distortion: a noise distortion, and a communication channel distortion.
In a conventional modem, the signal is sampled by an analog to digital conversion circuitry (ADC) that converts the analog front end of the received modulated carrier waveform to a digitized replica.
The timing recovery in a conventional modem is performed by a digital signal processor (DSP) that transforms the digital data from the digitized replica using a recovered timing error signal. For proper timing recovery, the receiver clock should be synchronized to the transmitter clock. More specifically, the sampling clock of the receiver should be frequency and phase synchronized to the symbol clock of the transmitter. This permits the received signal to be sampled at the optimum point in time to reduce the chance of a slicing error associated with decision-directed processing of received symbol values.
Prior art conventional modems use voltage controlled crystal oscillators (VCXOs) to keep the sampling clock signal stable yet controllable over a relatively narrow range so that it could be locked to the transmitter symbol clock.
However, a VCXO is an analog device that is expensive and prone to drift over its lifetime. In addition, it might be necessary to receive signals from different transmitters having different symbol clock frequencies, requiring replacement of the VCXO.
An alternative prior art timing recovery system operates by sampling a received signal at a fixed frequency slightly higher than twice the highest transmitter symbol rate. These samples are then processed by a digital interpolator to generate a sequence of time interpolated samples synchronized to the transmitter symbol rate. These interpolated synchronized samples are supplied to a digital symbol timing error detector. The output of the digital symbol timing error detector is typically supplied to a second order loop filter. A predetermined value, representing a nominal sampling frequency time delay, is added to the output signal of the loop filter. The combination of the predetermined nominal delay and the output signal from the loop filter controls a numerically controlled delay which provides integer and fractional clock delay component signals. The integer clock delay component signal is used to control production of a sampling clock enable signal synchronized to the transmitted symbol rate. This sampling clock enable signal may be further divided in frequency to provide a receiver symbol clock enable signal. The fractional clock delay component signal is applied to a control input of the interpolator so that the sampled signal produced by the interpolator represents the value of the received signal at the desired sampling time.
Such a timing recovery system is suitable when the quadrature phase shift key (QPSK) modulation is used to modulate the carrier.
However, such a timing recovery system is a relatively complex and expensive one when applied to a carrier modulated by a quadrature amplitude modulation (QAM) scheme.
Indeed, the QAM modulation scheme is the independent amplitude modulation of two orthogonal channels using the same carrier frequency. The required tolerances between the channels in a QAM signal with a dense constellation are difficult to meet. Signal distortions errors always present in the orthogonal channels result in crosstalk between channels which is very difficult to remove by further signal processing in an equalizer.
Thus, what is needed is a timing recovery system which can operate on QAM signals having different symbol rates without undue complexity and expense.
SUMMARY OF THE INVENTION
To address the shortcomings of the available art, one aspect of the present invention is directed to a method for generating a correction command for advancing or delaying the sample timing of a modem front end used to recover data from an incoming QAM baseband signal having maximum/minimum.
In one embodiment, the method comprising the following steps: (a) sampling the QAM baseband signal; (b) utilizing a symbol timing recovery logic to develop a local error signal; (c) averaging the local error signal over a predetermined time period; and (d) utilizing the averaged local error signal to make a global decision regarding the sampling point position relative to the baseband signal maximum/minimum.
Based on the global decision, a correction command is issued to the analog front end to either advance or delay the sample timing.
In one embodiment, the step (b) of utilizing the symbol timing recovery logic to develop the local error signal further includes the following steps: (b1) estimating an absolute value of the first derivative of the QAM baseband signal separately for the real and imaginary axis; (b2) adding the estimated absolute values of the real and the imaginary first derivatives of the QAM baseband signal to develop a resulting signal; and (b3) multiplying the resulting signal by a weighting function to develop the local error signal.
In one embodiment, the weighting function further includes a uniform weighting function utilized to develop the local error signal.
In another embodiment, the weighting function further includes a non-uniform weighting function used to develop the local error signal.
In one embodiment, the step (c) of averaging the local error signal over the predetermined time period further includes the steps of: (c1) utilizing an averaging logic to average the local error signal over the predetermined time period; and (c2) operating the averaging logic at at least twice the symbol rate.
In one embodiment, the averaging logic is operated at the rate equal to an even number times the symbol rate.
In another embodiment, the averaging logic is operated at the rate equal to an odd number times the symbol rate.
In one embodiment, an exponential averaging logic is utilized to perform the averaging operation. The exponential averaging logic is configured to assign the most weight to the most recent symbol.
Another aspect of the present invention is directed to a timing recovery circuit in QAM modems.
In one embodiment, the QAM timing recovery circuit comprises: (a) a sampler circuit configured to sample a QAM baseband signal; (b) a symbol timing recovery circuit configured to process the sampled QAM baseband signal and configured to develop a local error signal; (c) a symbol error averaging circuit configured to average the local error signal over a predetermined time period; and (d) a decision making circuit configured to utilize the averaged local error signal to make a global decision regarding the sampling point position relative to the baseband signal maximum/minimum.
REFERENCES:
patent: 4953117 (1990-08-01), Lagadec
patent: 5200981 (1993-04-01), Carmon
patent: 6101230 (2000-08-01), Chun et al.
Danzer Byron Esten
Isaksen David Bruce
Koralek Richard William
Pham Chi
Tankhilevich Boris G.
Tran Khai
Wideband Computers, Inc.
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