Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
1998-04-01
2001-06-05
Ramsey, Kenneth J. (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C445S024000
Reexamination Certificate
active
06242859
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a novel structure of a plasma display panel, and a novel method of manufacturing same whereby printing and annealing processes for forming a dielectric layer are eliminated.
2. Description of the Related Art
Plasma display panels (hereafter, abbreviated to PDP,) have received attention as large-screen full-colour display devices. In particular, in three-electrode surface-discharge AC-type PDPs, a plurality of display electrode pairs for generating surface discharges are formed on the display side of a substrate, and address electrodes orthogonal to these display electrode pairs, and a fluorescent layer covering these, are formed on the rear side of the substrate. Essentially, the device is driven by applying a large voltage to the display electrode pairs to reset the display, creating address discharges between one of the electrodes in the display electrode pairs and an address electrode, and generating sustain discharges using wall electric charges generated by address discharges created when a sustain voltage is applied between the display electrode pairs. The fluorescent layer generates RGB (red, green, blue) fluorescent light, for example, due to the ultraviolet rays generated by the susatin discharge, thereby producing a full-colour display. Consequently, a transparent electrode material is used for the display electrode pairs formed on the display side of the substrate.
This transparent electrode material is typically a semiconductor made from ITO (indium oxide In
2
O
3
and tin oxide SnO
2
semiconductor), and its conductivity is low compared to metal, or the like. Therefore, in order to raise the conductivity, a fine metal conductive layer is applied onto the transparent electrodes.
FIG. 8
shows a general dissembled oblique view of the aforementioned three-electrode surface-discharge AC-type PDP. In this example, the display light is emitted in the direction of the display-side glass substrate
10
(the upward direction in FIG.
8
).
20
is a rear-side glass substrate. An X electrode
13
X and a Y electrode
13
Y, each comprising a transparent electrode
11
and a bus electrode
12
of high conductivity formed thereon (therebelow in the drawing), are formed onto the display-side glass substrate
10
and this display electrode pair is covered by a dielectric layer
14
and protective layer
15
of MgO. The bus electrodes
12
are provided running between opposite ends of the X electrode and Y electrode to supplement the conductivity of the transparent electrodes
11
.
The bus electrodes
12
are metal electrodes having a chrome/copper/chrome triple-layer structure, for example. The transparent electrodes
11
are usually made from ITO (Indium tin oxide: Indium oxide In
2
O
3
and tin oxide SnO
2
semiconductor). The dielectric layer
14
is usually formed from a low-melting-point glass material whose principal component is lead oxide, and more specifically, it is a PbO—SiO
2
—B
2
O
3
—Zn glass.
On the rear-side glass substrate
20
, strip-shaped address electrodes A
1
, A
2
, A
3
are provided on a base passivation film
21
made from silicon oxide film, or the like, and they are covered by a dielectric layer
22
. The address electrodes A are formed such that they are positioned between strip-shaped partitions (ribs)
23
. These ribs
23
have two functions, namely, to prevent any effects on adjacent cells during discharge and to prevent cross-talk of the light. At adjacent ribs
23
, red, green and blue fluorescent layers
24
R,
24
G,
24
B are coated separately such that they cover the address electrodes and the side walls of the rib partitions. The display-side substrate
10
and the rear-side substrate
20
are assembled leaving a gap of approximately 100 &mgr;m, and a mixed discharge gas of Ne+Xe is sealed in the gap
25
therebetween.
FIG. 9
gives sectional views illustrating an approximate manufacturing process for the PDP in FIG.
8
. FIGS.
9
(
a
)-(
d
) and FIGS.
9
(
e
)-(
h
) show processes for the display-side substrate and processes for the rear-side substrate, respectively, and FIGS.
9
(
i
) shows a state where the two substrates are bonded together. A brief description of the manufacturing process is now given.
Firstly, as shown in FIGS.
9
(
a
)-(
d
), an electrode pair
11
comprising an X electrode and Y electrode made from transparent electrodes is formed by sputtering, or the like, onto the display side glass substrate
10
. Bus electrodes
12
are then formed thereon. A dielectric layer
14
is then formed covering these electrodes. This dielectric layer
14
is formed, for example, by fabricating glass powder in the form of a paste onto the surface of a substrate by screen printing, or the like, and then annealing for a long period at a high temperature of 600° C. or the like. A protective layer
15
of MgO, for example, is then formed onto the dielectric layer
14
.
On the other hand, as shown in FIGS.
9
(
e
)-(
h
), the address electrodes A are formed onto the rear-side glass substrate
20
by sputtering, and a dielectric layer
22
is formed thereon similarly to the foregoing. Partitions (ribs)
23
comprising thick dielectric material layer are then formed by sand-blasting, and fluorescent layers
24
are formed in the grooves between these ribs.
Thereupon, as shown in FIG.
9
(
i
), the two substrates
10
,
20
are finally sealed at 400° C. by a sealing material
25
, and using a hole (omitted from diagram) formed in the side of the rear-side substrate, the gas between the substrates is expelled under a raised temperature atmosphere, a discharge gas is introduced therein and the hole is sealed. For the sake of convenience, this diagram shows the display electrode pairs
11
rotated through 90°.
The dielectric layer
14
formed on the display-side glass substrate
10
has a memory function whereby it accumulates the wall charges generated during plasma discharge, and this layer is necessary for the subsequent sustain discharge. Furthermore, in order to direct the light from the fluorescent layers
24
outside the display-side glass substrate
10
, it is desirable for the display electrode pairs
11
to be transparent electrodes.
However, as described above, the formation of the dielectric layer
14
involves a complicated and time-consuming process whereby glass granules of relatively even diameter are fabricated and formed into a paste by mixing them with a solvent, and they are then screen printed and left for a long period of time in a high-temperature annealing atmosphere. In particular, it is necessary that the dielectric layer
14
formed onto the display-side substrate is transparent. Therefore, it is imperative to avoid leaving internal bubbles generated during annealing, and this requires complete removal of the bubbles by means of a high-temperature annealing process. Dielectric breakdown may also occur as a result of bubbles. Consequently, it is desirable for the process of forming this dielectric layer
14
to be simplified.
Moreover, when the glass paste is annealed after screen printing, the dielectric layer
14
will not necessarily be of even thickness. Therefore, a variation is produced in the discharge start voltage in the address period and the discharge start voltage in the sustain period. Moreover, a number of bubbles are left unavoidably in the dielectric layer
14
, even after annealing at high temperature, and if there is a variation in the thickness of the dielectric layer
14
, transparency will be impaired in the thicker portions of the dielectric layer
14
.
Furthermore, to increase the strength of the PDP, compressed reinforced glass is usually bonded to the display-side glass substrate. Since the annealing process for the dielectric layer
14
is conducted at a high temperature of 600° C., and the process of sealing to the rear-side substrate
20
is also conducted at a high temperature of 400° C., the strength due to reinforcement by compression will be lost in the high-temperature annealing and sealing process,
Awaji Noriyuki
Betsui Keiichi
Fukuta Shin'ya
Kasahara Shigeo
Nakazawa Akira
Fujitsu Limited
Ramsey Kenneth J.
Staas & Halsey , LLP
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