Semiconductor device and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S066000

Reexamination Certificate

active

06259120

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an insulated gate thin film transistor formed on an insulating material (e.g., glass) or a material such as a silicon wafer having thereon an insulating film (e.g., silicon oxide), and to a method for fabricating the same. The present invention is particularly effective for thin film transistors fabricated on a glass substrate having a glass transition temperature (deformation temperature or deformation point) of 750° C. or less. The thin film transistor according to the present invention is useful for driver circuits of, for example, active matrix liquid crystal displays and image sensors, as well as for three dimensional integrated circuits.
2. Description of the Related Art
Thin film transistors (referred to simply hereinafter as“TFTs”) are widely employed for driving, for example, liquid crystal displays of active matrix type and image sensors. TFTs of crystalline silicon having a higher electric field mobility are also developed as an alternative for amorphous silicon TFTs to obtain high speed operation. However, TFTs with further improved device characteristics and durability can be obtained by forming an impurity region having a high resistance (high resistance drain; HRD).
FIG. 4A
shows a cross section view of a conventional TFT having an HRD. The active layer comprises low resistance regions
1
and
5
, a channel forming region
3
, and high resistance regions
2
and
4
formed therebetween. A gate insulating film
6
is provided to cover the active layer, and a gate electrode
7
is formed on the channel forming region
3
through the gate insulating film
6
. An interlayer dielectric
8
is formed to cover the gate electrode
7
, and source/drain electrodes
9
and
10
are connected to the low resistance regions
1
and
5
. At least one of the elements selected from oxygen, nitrogen, and carbon is introduced into the high resistance regions
2
and
4
.
The introduction of at least one of the elements above, however, requires the use of photolithography. Thus, it is difficult to form high resistance regions on the edge portion of the gate electrode in a self-alignment; hence, the TFTs are fabricated at a low yield, and moreover, the TFTs thus obtained are not uniform in quality.
SUMMARY OF THE INVENTION
The present invention provides TFTs having uniform device characteristics at a high yield by forming the high resistance regions in a self-alignment without using photolithography.
A TFT according to the present invention is shown schematically in FIG.
4
B. The position and the size of high resistance (impurity) regions
12
and
14
depend on a gate insulating film
16
and a gate electrode portion (comprising a gate electrode
17
and in some cases, an anodic oxide film
17
′). That is, at least one of nitrogen, oxygen, carbon, etc., is introduced into the active layer using the gate electrode portion and the gate insulating film
16
as masks. By controlling the accelerating voltage of the ions to control the depth of ion doping, the ion concentration is found to be maximum at a predetermined depth. In case nitrogen ions are introduced at an accelerating voltage of 80 kV, a maximum concentration for nitrogen ions can be achieved at a depth of 1,000 Å. Even in an active layer, the concentration of nitrogen ions differs with the depth in such a case.
In case a gate insulating film and a gate electrode portion are provided at a thickness of 1,000 Å and 3,000 Å or more, respectively, the gate electrode portion is sufficiently thick to prevent nitrogen ions from introducing into the active layer formed under the gate electrode portion. As illustrated in
FIG. 4C
, most of the nitrogen ions pass through the active layer
21
at a portion (shown with line B-B′) where the active layer is exposed. Accordingly, nitrogen ions are formed at a highest concentration at a portion under the active layer
21
, e.g., the substrate. In contrast to this, a highest nitrogen ion concentration is achieved in the active layer at a portion (line A-A′) where the gate electrode portion is not present and the gate insulating film
16
is present.
Accordingly, a high resistance region can be formed in a self-alignment by selectively introducing the nitrogen ions into the active layer under the portion at which the gate insulating film is present and the gate electrode portion is not present. Referring to
FIG. 4D
, low resistance (impurity) regions
11
and
15
and high resistance regions
12
and
14
are formed by doping an N- or P-type impurity. The N- or P-type impurity can be doped before introducing nitrogen ions.
In case of forming an anodic oxide
17
′ on the surface of the gate electrode
17
, the high resistance regions
12
and
14
are offset from the gate electrode
17
. The displacement x according to the offset depends on the thickness of the anodic oxide
17
′, and the low resistance regions
11
and
15
are displaced horizontally from the gate electrode
17
for a distance corresponding to the sum of the width of the region
12
and the displacement x.
According to the present invention, an oxide layer formed by anodically oxidizing the gate electrode and the like is used as the gate insulating film
16
to form the high resistance region in a self-alignment. The thickness of the anodic oxide can be precisely controlled. More specifically, the anodic oxide film can be formed uniformly at a thickness of 1,000 Å or less to a thickness of 5,000 Å or more (e.g., to 1 &mgr;m). Thus this is preferred because a high resistance region can be formed with a greater degree of freedom, and, moreover, in case of using a self-aligned process, the high resistance region can be formed without causing fluctuation in its width.
In contrast, to a so-called barrier type anodic oxide which is etched only by a hydrofluoric etchant, a porous type anodic oxide can be selectively etched by a phosphoric acid etchant and the like. Accordingly, an etching treatment can be effected without damaging other materials constituting the TFT, for example, silicon and silicon oxide. In case of dry etching, the barrier or porous anodic oxide is extremely resistant against etching, and exhibits a sufficiently high selectivity ratio in case of etching with respect to silicon oxide.
According to the present invention, a TFT can be fabricated by the following processes. Thus, high resistance regions can be formed with a higher certainty and therefore mass production is improved.
Referring to
FIGS. 1A
to
1
E, a basic process for fabricating a TFT according to the present invention is described below. A base insulating film
102
is formed on a substrate
101
. An active layer
103
is formed from a crystalline semiconductor (a semiconductor comprising a crystal even at a small quantity, for example, a single crystal semiconductor, polycrystalline semiconductor, semi-amorphous semiconductor or the like is referred to as “a crystalline semiconductor” in the present invention. An insulating film
104
comprising silicon oxide is formed to cover an active layer
103
, and a coating is formed by an anodically oxidizable material. Preferably, an anodically oxidizable material such as aluminum, tantalum, titanium, and silicon, is sued as the coating material. Moreover, a monolayered gate electrode using one of the above materials as well as a multilayered gate electrode comprising two layers or more of the above materials can be utilized. For example, a double layered structure comprising titanium silicide formed on aluminum or a double layered structure comprising aluminum formed on titanium nitride can be used. Each of the layers is provided at a thickness depending on the device characteristics.
A mask film used as the mask in the anodic oxidation is formed to cover the coating and then the coating and the mask film are patterned and etched simultaneously, thereby to form a gate electrode
105
and a mask film
106
. The mask film can be formed using a photoresist u

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