Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-04-27
2001-05-15
Chang, Kent (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S089000, C345S098000
Reexamination Certificate
active
06232948
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving circuit for a liquid crystal display in an active matrix driving scheme.
2. Description of the Related Art
Liquid crystal displays are used in various devices, for example portable devices and portable terminals such as notebook computers due to the characteristics of the thin shape, light weight and low power. Among them, liquid crystal displays using an active matrix driving scheme are increasingly in demand due to the characteristics of fast response, very fine display and display in multiple levels of gradation. A display unit of the liquid crystal display using an active matrix driving scheme generally comprises a semiconductor substrate having transparent pixel electrodes and thin film transistors (TFT) arranged thereon, an opposite substrate having a transparent electrode (common electrode) formed over its surface and a structure having the two substrates opposing each other to encapsulate the liquid crystal therebetween. A graduation voltage is applied to each pixel electrode by controlling the TFT with a switching function and transmittance of the liquid crystal is changed by voltage differences between each pixel electrode and the electrode on the opposing substrate to provide display on the screen. Data lines for sending a gradation voltage (data signal) to be written to each pixel electrode and scanning lines for sending a switching control signal (scanning signal) for the TFT are wired on the semiconductor substrate. A pulse-shape scanning signal is sent to each scanning line from a gate driver. When the scanning signal of the scanning line is at a high level, all the TFTs connecting the scanning line are turned on, and the gradation voltages (data signals) sent to the data line are written to the pixel electrodes through the TFTs. When the scanning signal becomes of low level to change the TFT to the off state, the difference between the gradation voltage written to the pixel electrode and the voltage at the common electrode is maintained until the graduation voltage is rewritten to the pixel electrode. All the pixel electrodes are written with predetermined voltages by sequentially sending the scanning signal to each scanning line, and display on the screen can be achieved by rewriting in a frame period.
In this way, the liquid crystal is driven by writing the gradation voltage to the pixel electrode through the data line in the liquid crystal display. A data driver for driving the data line must drive not only a liquid crystal capacitance for one pixel but also a large capacitive load including wiring resistance and wiring capacitance. As a large capacitance data line load needs to be fast driven at a high voltage precision in order to achieve a very fine display and display in multiple levels of gradation, a high performance data driver is required, so that various data drivers have been developed. Among them, a first prior art shown in
FIG. 1
is one which enables a highly precise voltage output. In the prior art, a gradation voltage generated by a resistance string
1
A is selected by a selection circuit
3
to be outputted directly to a data line load
5
, so that the voltage precision depends on the resistance ratio of resistance elements comprising the resistance string
1
, and a highly precise voltage output can be provided. Although
FIG. 1
shows a driving circuit for one data line, even with a plurality of data lines, variations in the output voltage for each data line hardly occurs by sharing a resistance string.
In addition, as the number of scanning lines and the number of data lines are increased due to a finer panel, an output period for one data is shortened and a high current supply capability is required for the data driver in order to fast drive the data line load. A second prior art shown in
FIG. 3 and a
third prior art shown in
FIG. 4
(Japanese Patent Application No. 27623/96) are ones which meet such requirements. The second prior art (
FIG. 3
) is a driving circuit in which a gradation voltage generated by a resistance string
1
A is selected by a selection circuit
3
to be amplified by an operational amplifier
7
and outputted to a one data line load
5
. This driving circuit has a high current supply capability as an impedance conversion is performed by the operational amplifier
7
, so that the data line load can be fast driven. The third prior art (
FIG. 4
) is a multi-value voltage source circuit in which a voltage generated by a resistance element group
31
is selected by a semiconductor switch group SW
1
, SW
2
, . . . , SW
n+1
to be biased to a gate of a MOS transistor Tr, and the voltage which is decreased from the gate bias voltage by a threshold voltage is taken from a source to be outputted. In this circuit, the MOS transistor Tr is operated as a source follower, so that the multi-value voltage can be outputted at a low impedance, and the data line load can be fast driven when this circuit is used as a driving circuit for a data driver. Also, a highly precise voltage can be produced by connecting voltage control circuits
32
and current control circuits
33
at both ends of the resistance element group
31
to correct variations in the threshold voltage of the MOS transistor Tr.
In order to utilize the liquid crystal display for portable devices and portable terminals, not only a highly precise voltage output and a fast driving capability but also a smaller power consumption is required.
For the first prior art (FIG.
1
), however, the gradation voltage is outputted from each connecting terminal within the resistance string
1
A, so that the output impedance varies depending on the gradation voltage. In this case, as the driving speed depends on a time constance of the delay through the impedance of the data line load and the output impedance of the resistance string
1
A, the time constant of the delay needs to be decreased by reducing the resistance value of the resistance string
1
A generating the gradation voltage to fast drive the data line for an arbitrary gradation. However, there is a problem that when the resistance value of the resistance string
1
A is decreased, a current across the resistance string
1
A is increased in the case of a constant supply voltage, and the consumption power at the driving circuit is increased.
On the other hand, for the second prior art (FIG.
3
), the power consumption through an internal current in the operational amplifier occurs in addition to the consumption power through a current across the resistance string
1
A and a charge and discharge of the data line, so that the consumption power is considerable for a very fine panel with a number of data lines. Also, the operational amplifier has an offset resulting from variations in the characteristics of the transistor, so that variations in the output voltage precision can occur.
For the third prior art (FIG.
4
), although the power consumption exists through a current across the resistance element group and a charge and discharge of the data line load, the current across the resistance element group can be suppressed as an impedance conversion is performed by the MOS transistor, so that the consumption power is relatively small. However, there is a problem that the structure of the driving circuit is complicated as the voltage control circuits and the current control circuits are connected at both ends of the resistance element group to prevent the output voltage from varying due to variations in the threshold voltage of the MOS transistor.
In this way, it is difficult to simultaneously realize a highly precise voltage output, fast driving and low power consumption using a simple circuit structure for a greatly fine panel with a number of data lines in a driving circuit of the prior art liquid crystal display.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a driving circuit for a liquid crystal display which simultaneously realizes a highly precise voltage output, fast driving and low power
Chang Kent
NEC Corporation
Sughrue Mion Zinn Macpeak & Seas, PLLC
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