Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1997-01-14

1998-10-20

Hoang, Huan

Static information storage and retrieval

Addressing

Plural blocks or banks

36523004, 3652385, 365205, G11C 800

Patent

active

058257098

ABSTRACT:
A semiconductor memory device of this invention includes: a memory cell array including a plurality of bit blocks each including a plurality of bit line groups each including a plurality of bit lines; a row decoder for designating a row over the plurality of bit blocks based on a row address so that data stored in memory cells on the designated row is read out to bit lines corresponding to the memory cells; a column decoder for designating a plurality of the bit lines each belonging to different one of the bit line groups based on a column address; a plurality of sense amplifiers each provided for one of the plurality of bit line groups for sensing and amplifying data on the designated bit lines; a plurality of latch circuits each provided for one of the plurality of sense amplifiers for latching outputs of the plurality of sense amplifiers; and a selector for alternately selecting one of outputs of the plurality of latch circuits corresponding to different bit line groups, thereby rapidly outputting the data.

REFERENCES:
patent: 4800530 (1989-01-01), Itoh et al.
patent: 5257235 (1993-10-01), Miyamoto
patent: 5276650 (1994-01-01), Kubota
patent: 5331600 (1994-07-01), Higuchi
patent: 5519655 (1996-05-01), Greenberg
patent: 5619473 (1997-04-01), Hotta
patent: 5642322 (1997-06-01), Yoneda
patent: 5654932 (1997-08-01), Rao

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