Semiconductor non-volatile storage device having verification po

Details Semiconductor non-volatile storage device having verification po Semiconductor non-volatile storage device having verification po

1996-01-16

1998-10-20

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518524, G11C 1606

Patent

active

058256903

ABSTRACT:
A semiconductor non-volatile storage device has a memory cell array including a plurality of memory cells arranged in a form of matrix. Each of the memory cells has a charge accumulation layer and a control gate stacked on a semiconductor substrate for enabling electrical updating by increasing and decreasing of charge in the charge accumulation layer. An equal level of verification potential is applied for all of bit lines of the memory cells and a predetermined verification potential is applied to a selected control gate for performing re-writing for insufficiently written memory cells without generating data for re-writing per every verification by a logic circuit.

REFERENCES:
patent: 5299162 (1994-03-01), Kim
patent: 5357462 (1994-10-01), Tanaka
patent: 5379256 (1995-01-01), Tanaka
patent: 5386422 (1995-01-01), Endoh
patent: 5452249 (1995-09-01), Miyamoto

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