Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
1999-12-28
2001-06-26
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S261000, C360S067000, C360S068000
Reexamination Certificate
active
06252457
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a differential amplifier circuit and, more particularly, to a differential amplifier circuit for amplifying an ac signal, when a signal source to be amplified is the one in which an ac voltage signal is superimposed on a dc voltage.
BACKGROUND ART
FIG. 6
is a circuit diagram showing an example of a differential amplifier circuit according to a prior art. In
FIG. 6
, reference numeral
1
indicates a signal source in which an ac voltage signal is superimposed on a dc voltage source, and signals on two terminals are respectively inputted to bases of NPN transistors Q
1
and Q
2
forming a differential input section
2
. Further, collectors of the NPN transistors Q
1
and Q
2
are respectively connected to a first voltage source Vcc through resistors R
1
and R
2
, and emitters are respectively connected to a second voltage source Vee through constant current sources I
4
and I
5
. Furthermore, the emitters of the NPN transistors Q
1
and Q
2
are connected to each other through a capacitor C
5
.
Referring to
FIG. 6
, as a specific example of the signal source
1
in which an ac voltage signal is superimposed on a dc voltage source, a magneto-resistive head (MRH) is known.
In the operation of this conventional differential amplifier circuit, between ac voltage component and dc voltage component on the two terminals of the signal source
1
, influence of the dc voltage component is removed by the capacitor C
5
. And a signal formed by amplifying only the ac voltage component from the collectors of the transistors Q
1
and Q
2
is outputted from an output terminal.
In the arrangement shown in
FIG. 6
, supposing that the constant current sources I
4
and I
5
are respectively 5 mA, it is calculated that to get a lower limit cutoff frequency of 1 MHz in the amplifier circuit, a value of the capacitor C
5
mounting to 0.0156 &mgr;F. is required.
This value of 0.0156 &mgr;F. of the capacitor C
5
is a so large value that it is difficult to incorporate any ordinary capacitor in a semiconductor integrated circuit. Thus, there is a disadvantage that such a capacitor is obliged to be disposed from outside in the form of an outside part.
To overcome such a disadvantage, as shown in
FIG. 7
, there has been provided an improved differential amplifier circuit capable of incorporating a capacitor in the semiconductor integrated circuit.
In
FIG. 7
, two terminals of the signal source
1
are respectively connected to bases of NPN transistors Q
13
and Q
14
. Collectors of the NPN transistors Q
13
and Q
14
are respectively connected to a first power source Vcc, and their emitters are respectively connected to a second voltage source Vee through constant current sources I
6
and I
7
.
Further, the emitters of the NPN transistors Q
13
and Q
14
are connected to bases of NPN transistors Q
1
and Q
2
forming a differential input section through capacitors C
6
and C
7
. Further, collectors of the NPN transistors Q
1
and Q
2
are respectively connected to the first voltage source Vcc through resistors R
11
and R
2
, and respectively connected to output terminals. Furthermore, emitters of the NPN transistors Q
1
and Q
2
are connected to each other, and connected to the second voltage source Vee through a constant current source I
1
.
In the above differential amplifier circuit comprising the NPN transistors Q
1
and Q
2
, between ac voltage component and dc voltage component on the two terminals of the signal source
1
, only the ac voltage component is inputted by the capacitors C
6
and C
7
, and therefore an operation for amplifying only the ac voltage component is performed.
In the arrangement shown in
FIG. 7
, supposing that the constant current source I
1
is 10 mA, it is calculated that to get a lower limit cutoff frequency of 1 MHz in the amplifier circuit, values of the capacitors C
6
and C
7
respectively mounting to 153 pF are required.
This value of the capacitors is a large value of a level making it possible to incorporate the capacitors in a semiconductor integrated circuit.
However, when the capacitors C
6
and C
7
are incorporated in the semiconductor integrated circuit, to prevent the two terminals of the signal source
1
from being influenced by parasitic capacity component of the capacitors C
6
and C
7
, it is essential to provide the NPN transistors Q
13
and Q
14
therebetween. Hence there arises a further problem that to reduce noise generated in the NPN transistors Q
13
and Q
14
, a collector current applied to the NPN transistors Q
13
and Q
14
must be equivalent to that applied to the NPN transistors Q
1
and Q
2
forming the differential amplifier circuit. In other words, to form a circuit of less noise, a problem exists in that a collector current not less than 5 mA is required for each of the NPN transistor Q
1
, Q
2
, Q
13
and Q
14
, which results in considerable power consumption in the entire circuit.
Thus, in the conventional differential amplifier circuit arranged as mentioned above, there exists a problem that it is impossible to incorporate any capacitor in the semiconductor integrated circuit or that even if it is possible to incorporate it, large power consumption is unavoidable.
DISCLOSURE OF THE INVENTION
Accordingly, the present invention was made to solve the above-discussed problems incidental to the prior art, and has an object of providing a differential amplifier circuit of less power consumption capable of incorporating a capacitor or capacitors for removing the dc voltage component of the signal source in the semiconductor integrated circuit.
This object and advantages are achieved by providing a novel and improved differential amplifier circuit for treating a signal in which an ac voltage signal is superimposed on a dc voltage, the differential amplifier circuit according to the invention being characterized in that:
two terminals of a signal source are respectively connected to bases of a first NPN transistor and a second NPN transistor; emitters of the first NPN transistor and the second NPN transistor are respectively connected to collectors of a third NPN transistor and a fourth NPN transistor; emitters of the third NPN transistor and the fourth NPN transistor are commonly connected, and further connected to a first power source through a constant current source; the collectors and bases of the third NPN transistor and the fourth NPN transistor are respectively connected through first and second capacitors; bases of the third NPN transistor and the fourth NPN transistor are respectively connected to a first reference power source through first and second resistors; and collectors of the first NPN transistor and the second NPN transistor are respectively connected to a second power source through third and fourth resistors, and respectively connected to output terminal.
Another differential amplifier circuit for treating a signal in which an ac voltage signal is superimposed on a dc voltage according to the invention includes: plural signal sources; and plural differential input sections formed by connecting two terminals of each signal source respectively to bases of a first NPN transistor and a second NPN transistor in each individual signal source of the plural signal sources; and in which
emitters of the plural first NPN transistors and the plural second NPN transistors are commonly connected, and respectively connected to collectors of a third NPN transistor and a fourth NPN transistor; emitters of the third NPN transistor and the fourth NPN transistor are commonly connected, and further connected to a first power source through a constant current source; the collectors and bases of the third NPN transistor and the fourth NPN transistor are respectively connected through first and second capacitors; bases of the third NPN transistor and the fourth NPN transistor are respectively connected to a first reference power source through first and second resistors; and collectors of the plural first NPN transistors and the plural second NPN transistors are commonly connected, and fur
Takeuchi Toru
Umeyama Takehiko
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Shingleton Michael B
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