Method of etching to form high tolerance polysilicon resistors

Semiconductor device manufacturing: process – Making passive device – Resistor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S382000

Reexamination Certificate

active

06180479

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a resistance layer is formed of polysilicon.
2. Description of the Related Art
Many resistance layers are formed in a semiconductor device, and a polysilicon layer is used as the resistance layer for high integration and high density. As shown in
FIG. 1
, a polysilicon film
103
is formed on the insulating films
101
and
102
formed on a silicon substrate
100
to have a desired pattern. An interlayer insulating film
106
is formed on the polysilicon layer
103
. Contact holes are formed in the interlayer insulating film
106
so that wiring films
107
are connected to the polysilicon layer
103
. Thus, the resistance film
103
of the polysilicon is formed.
It is conventionally known that the polysilicon resistance films formed thus have a variance in resistance. A method of suppressing the resistance variance is described in Japanese Laid Open Patent Application (JP-A-Heisei 9-232521).
Also, it is known that the resistance values of the polysilicon films have a variance when hydrogen atoms are diffused into the polysilicon resistance film. To prevent the resistance variance due to the diffusion of hydrogen atoms, a technique is known in which a silicon nitride film is formed on the surface of the polysilicon resistance film.
However, impurity ions which have been implanted into the polysilicon resistance film to decrease a contact resistance are diffused into a resistance region of the polysilicon resistance film in a thermal process for the forming of the silicon nitride film. As a result, the resistance variance occurs. A method of preventing such a resistance variance is known in Japanese Laid Open Patent Application (JP-A-Heisei 9-121024).
The resistance variance of the polysilicon resistance film is also based on a variance of contact resistance. That is, as shown in
FIG. 1
, when the contact hole is formed by a plasma etching method, an opening portion of the polysilicon resistance film is cut because of over-etching, so that the contact resistance variance occurs.
Therefore, it is desired that the damage of the polysilicon resistance film because of the over-etching in the case of forming the contact hole is restrained so that the variance in contact resistance of the polysilicon film is retrained.
SUMMARY OF THE INVENTION
The present invention is accomplished based on such technical problems. Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device, in which a variance in a contact resistance of a polysilicon resistance film can be restrained.
Another object of the present invention is to provide a method of manufacturing a semiconductor device, in which a variance in a sheet resistance of a polysilicon resistance film can be restrained.
In order to achieve an aspect of the present invention, a method of manufacturing a semiconductor device includes:
forming a polysilicon resistance film directly or indirectly on a semiconductor substrate;
forming a first insulating film on the polysilicon resistance film;
forming a second insulating film on the first insulating film; and
forming an opening portion to pass through the first insulating film and the second insulating film to the polysilicon resistance film. The first insulating film has an etching rate equal to or smaller than ⅛ of an etching rate of the second insulating film
The first insulating film is a nitride film, and the nitride film has a film thickness of 40 Å to 200 Å. The first insulating film is formed on the polysilicon resistance film by an annealing method at a temperature of 600° C. to 630° C.
The second insulating film is one of an oxide film, a BSG film and a BPSG film.
When the opening portion is formed, the first and second insulating film are etched with the same etching conditions.
The polysilicon resistance film has a film thickness of 1500 to 3000 Å.
In order to achieve another aspect of the present invention, a method of manufacturing a semiconductor device includes:
forming a polysilicon resistance film directly or indirectly on a semiconductor substrate;
forming an oxide film on the polysilicon resistance film;
forming a first insulating film on the oxide film;
forming a second insulating film on the first insulating film; and
forming an opening portion to pass through the first insulating films the second insulating film, and oxide film to the polysilicon resistance film. The first insulating film has an etching rate equal to or smaller than ⅛ of the etching rate of the second insulating film.
In order to achieve still another aspect of the present invention, a method of manufacturing a semiconductor device includes:
forming a polysilicon resistance film directly or indirectly on a semiconductor substrate;
forming a first insulating film through an annealing process at a temperature of 600° C. to 630° C. to cover the polysilicon resistance film;
forming a second insulating film on the first insulating film; and
forming an opening portion to pass through the first insulating film and the second insulating film to the polysilicon resistance film. The first insulating film has an etching rate equal to or smaller than ⅛ of an etching rate of the second insulating film.


REFERENCES:
patent: 5198688 (1993-03-01), Tsuchiya et al.
patent: 5327224 (1994-07-01), Ikegami et al.
patent: 5470764 (1995-11-01), Ikegami et al.
patent: 5751050 (1998-05-01), Ishikawa et al.
patent: 6011293 (2000-01-01), Yuzuriha et al.
patent: 42 44 771 C2 (1996-05-01), None
patent: 59-168640 (1984-09-01), None
patent: 63-248157 (1988-10-01), None
patent: 5-275619 (1993-10-01), None
patent: 6-112410 (1994-04-01), None
patent: 6-244152 (1994-09-01), None
patent: 6-295985 (1994-10-01), None
patent: 9-55381 (1997-02-01), None
patent: 9-129595 (1997-05-01), None
patent: 9-121024 (1997-05-01), None
patent: 9-232521 (1997-09-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of etching to form high tolerance polysilicon resistors does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of etching to form high tolerance polysilicon resistors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of etching to form high tolerance polysilicon resistors will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2520552

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.