Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-09-30
2001-07-31
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S118000, C438S455000, C438S617000
Reexamination Certificate
active
06268236
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly, relates to a structure of a package of a high-frequency semiconductor element such as a GaAs-FET as well as to a method of manufacturing the semiconductor element.
2. Background Art
In a semiconductor package utilized in a high-frequency band, more particularly the C-band or the Ku-band, a substance such as epoxy resin having a large dielectric constant comes into close contact with a semiconductor chip within a commonly-used mold package, thereby introducing parasitic capacitance and deteriorating the characteristics of the semiconductor package. To prevent such parasitic capacitance, a package having a hollow cavity is commonly used for encapsulating the semiconductor chip so that the air surrounds the top surface of the semiconductor chip.
In contrast with the commonly-used transfer mold package, the hollow package involves the following disadvantages and hence suffers negative aspects in terms of productivity and costs.
First, when packages are transported as separate pieces, the packages must be frequently rearranged in different layouts during assembly/test processes.
Further, when a carrier belt is used for transporting the packages, the packages may be brought into random arrangements upon undergoing very small physical shock. Further, in the case where the carrier belt is used for transporting the packages, there is a limitation on the number of packages processed by an automatic machine, thus deteriorating productivity of the semiconductor package.
Second, as is likely to be the case with a lead frame, separate packages are brazed to a metal frame through use of a brazing filler material of Ag in order to improve productivity, so that the packages are brazed so as to assume the structure of a commonly-used mold-type lead frame. In this case, however, brazing adds to the manufacturing costs. Further, even in terms of productivity, the separate packages must be individually sealed in the course of a sealing process. Thus, the hollow package is inferior in productivity to the mold package.
The present invention has been conceived to solve the problem in the background art, and the object of the present invention is to provide a method of manufacturing a semiconductor device encapsulated in a hollow package, which method prevents deterioration of the high-frequency characteristics of the semiconductor device while ensuring the same productivity and costs as achieved by the mold package.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, in a method of manufacturing a semiconductor device, each semiconductor chip is housed in each of a plurality of cavities formed in the primary surface of a plate-like base substrate. A plate-like cap member is bonded onto the primary surface of the base substrate. Further, the bonded base substrate and the cap member are separated along each space between adjacent cavities, and thus a plurality of semiconductor devices which includes the semiconductor chip respectively are formed.
In another aspect of the invention, in the method, a plurality of penetrating holes may be formed in the base substrate between adjacent cavities.
Further in another aspect of the invention, in the method, the base substrate may be formed by bonding a first plate-like substrate and a second plate-like substrate in which a plurality of other penetrating holes for forming a plurality of cavities are formed.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5041396 (1991-08-01), Valero
patent: 5950070 (1999-09-01), Razon et al.
patent: 1-134956 (1989-05-01), None
patent: 4-148553 (1992-05-01), None
Collins D. M.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Picardat Kevin M.
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