Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
1999-07-20
2001-08-07
Fahmy, Wael (Department: 2823)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S960000
Reexamination Certificate
active
06271101
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for production of a thin-film transistor (TFT for short hereinafter) with single-crystal semiconductor thin film formed on a substrate having an insulating surface. The present invention relates also to a process for production of a semiconductor device containing semiconductor circuits constructed of TFTs.
The term “semiconductor device” as used in this specification embraces any device that utilizes semiconductor characteristics for its functions. To be more specific, it includes electro-optical devices typified by liquid crystal displays, semiconductor circuits formed by integration of TFTs, and electronic machines and equipment containing as parts such electro-optical devices and semiconductor circuits.
2. Description of the Relates Art
The recent rapid progress in VLSI technology has yielded SOI (silicon on insulator) which is attracting attention because of its low power consumption. This technology differs from the conventional one in that the bulk single-crystal silicon that forms the active region (or channel-forming region) of FET is replaced by thin-film single-crystal silicon.
An SOI substrate consists of single-crystal silicon and thin film of single-crystal silicon formed thereon, with a buried silicon oxide film interposed between them. There are several known methods for its production. A new technology that is attracting attention is a bonded SOI substrate which is produced by bonding together two silicon substrates. This technology is expected to form thin film of single-crystal silicon on a glass substrate or the like.
The most noticeable among the technologies of bonded SOI substrate is “Smart-Cut” (a registered trademark of SOITEC Co., Ltd.). It utilizes the hydrogen brittleness. For more detail, refer to “Electronic material”, pp. 83-87, August, 1997, issued by Kogyo Chosa kai.
The “Smart-Cut” process consists of forming thin film of single-crystal silicon on a silicon substrate as a support by heat treatment in two steps. The first heat treatment is performed at 400-600° C. so as to bring about hydrogen embrittlement and separate thin film of single-crystal silicon, and the second heat treatment is performed at about 1100° C. so as to stabilize the bonding interface.
The disadvantage of this process is that the second heat treatment causes a strong stress to occur in the thin film of single-crystal silicon and this stress causes the thin film of single-crystal silicon to crack and peel at the edges of the silicon substrate. This is a serious problem with “Smart-Cut” process, and an effective solution to it is required.
SUMMARY OF THE INVENTION
The present invention was completed to address the above-mentioned problem. Thus, it is an object of the present invention to provide a process for producing a bonded SOI substrate without causing cracking and peeling to the thin film of single-crystal semiconductor.
The present invention will contribute to the yield and production cost of TFTs formed on an SOI substrate and in turn contribute to the yield and production cost of semiconductor circuits and electro-optical devices with TFTs. Moreover, the present invention will contribute to the yield and production cost of electronic machines equipped with said semiconductor circuits and electro-optical devices.
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patent: 5882987 (1999-03-01), Srikrishnan
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“A Dissolved Wafer Process Using a Porous Silicon Sacrificial Layer and a Lightly-Doped Bulk Silicon Etch-Stop”, Bell et al., Micro Electro Mechanical Systems, 1998. MEMS 98. Proceedings., The Eleventh Annual International Workshop on, 1998, pp. 251-256.*
A.J. Auberton-Herve et al., Industrial Research Society (Kogyo Chosa Kai); Electronic Material, pp. 83-87, Aug. 1997 (Concise Statement attached).
Brewster William M.
Costellia Jeffrey L.
Fahmy Wael
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
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