Multiplex communications – Fault recovery
Reexamination Certificate
1998-04-02
2001-09-25
Chin, Wellington (Department: 2731)
Multiplex communications
Fault recovery
C370S242000, C370S252000, C714S002000, C714S797000
Reexamination Certificate
active
06295274
ABSTRACT:
BACKGROUND
The present invention according to a first aspect relates to a redundancy system for a functional entity in a digital switch, and a method for providing such a redundancy system.
According to a second aspect the invention relates to a redundancy system for a digital switch with switch inputs and switch outputs and switch equipment therebetween. The switch equipment comprises a switch core and functional entities, a, connection path for data flows between a switch input and a, switch output being able to comprise a number of such functional, entities on both sides of the core. The redundancy system comprises switch planes working in parallel and having mutually essentially identical switch equipment and majority vote functions, distributing means for distributing a data flow coming in from the outside to the equipments of the switch planes, and assembling means for assembling the data flows coming from the switch planes.
According to the second aspect the invention also relates to a method for providing a redundancy structure for a digital switch with switch inputs and switch outputs and switch equipment therebetween, that comprises a switch core and functional entities, a connection path for data flows between a switch input and a switch output being able to comprise a number of such functional entities on both sides of the core.
U.S. Pat. No. 4,706,150 relates to a switching protocol for multiple autonomous switching planes. Supervision is performed of switching in the planes and retrials are provided when connection attempts are unsuccessful. The retrials can consist in a user having established connections through a majority of the planes emitting a retrial request that sets aside the already established connections in the remaining planes. According to an alternative form all users emit retry requests, the planes in accordance with a priority scheme among the users accepting a higher prioritized request and rejecting a lower one.
U.S. Pat. No. 5,278,843 discloses a multiple processor system in which appearance of faults in the microprocessors is decided in accordance with a majority rule and selection is performed on the basis thereof and a predetermined priority order, an output signal being emitted from the microprocessor in which there is no fault and the priority order of which is higher.
In EP 097,781 there is described a method for testing very fast logic systems while using a slow testing device. Different test patterns are used at the testing.
U.S. Pat. No. 4,393,490 relates to digital switch systems with built-in fault identification, there being used i.a. a fault pattern injection.
U.S. Pat. No. 4,535,442, GB 1,393,645, GB 1,439,568 and GB 1,582,456 describe different types of digital switch systems with fault supervision.
Majority vote functions in triplicated redundancy systems have been used during a long time, e.g. in telecommunication equipments.
An example of this appears e.g. from the Swedish patent 466,475.
Use only of majority votes, has in certain cases turned out to be unsufficient when all three planes are not fault free. In particular this is true in case of problems arising at managing the planes in a system due to a fault when a plane or a card is replaced or the system is expanded or reconfigured when changing card types. This can give rise to disturbances on a system level.
SUMMARY
A first general object of the invention is to provide an improved redundancy system for telecommunication equipments, in particular digital time switches.
In a redundancy system building upon use of majority vote functions there is a second object to introduce functionality enabling handling of problems caused by one or more of the planes being not fault free.
A third particular object is to introduce functionality that results in improved handling of the planes due to faults when planes or cards are exchanged, or when the system is expanded or reconfigured in case of changing card types.
A fourth particular object in the just mentioned context is to enable handling of cards without disturbances on a system level.
Further objects will appear from the closer description henceforth of the invention and its advantages, in particular the description of embodiments with reference to the drawings.
The above objects have been attained by that stated in the attached patent claims.
In the redundancy system according to the first aspect, the functional entity is at least triplicated in planes working in parallel, means are provided for spreading from each plane a respective passing-by data flow to each plane in parallel therewith. Each plane has a unit for maintenance functions including a majority vote function that receives the data flows of the own plane and the planes in parallel therewith and compares these on a bit level for creating a majority voted data flow. A plane condition sensing function indicates if links of the planes have meaningful information and synchronism and as a result emits a link condition indicating signal for each plane, that forms an indication thereof. A priority select function is connected to receive the majority voted data flow and the link condition indicating signals and, if the latter do not indicate a fault condition, lets through the majority voted data flow as an outgoing data flow from the functional unit. In case of indication of a fault condition in one or more of the link condition indicating, signals the priority select function selects the data flow from one of the planes as an outgoing data flow on the basis of a determined priority order.
The redundancy system according to the second aspect is distributed to at least a plurality of the functional entities on each of the connection paths for data flow between switch output and switch input, in a way that each such functional entity has its own redundancy subsystem with planes working in parallel and comprising means for spreading from the equipment of each plane a respective passing-by data flow to each equipment in parallel therewith. Each plane and each switch output has a unit for maintenance functions including a majority vote function that, receives the data flows of the own plane and the planes in parallel therewith and compares these on a bit level for creating a majority voted data flow. A plane condition sensing function indicates if links of the planes have meaningful information and synchronism and as a result emits a link condition indicating signal for each plane, that forms an indication thereof. A priority select function is connected to receive the majority voted data flow and the link condition indicating signals. If the link condition indicating signals do not indicate a fault condition, the priority select function lets through the majority voted data flow as an outgoing data flow, but in case of indication of a fault condition in one or more of the link condition indicating signals the priority select function selects the data flow from one of the planes as an outgoing data flow on the basis of a determined priority order.
The redundancy systems according to the first and second aspects have a number of preferred and important embodiments, of which some are stated below.
The unit for maintenance functions suitably also includes a plane comparison function that compares the parallel data flows with the majority voted data flow and in case of deviation from this emits a fault indicating signal for the deviating data flows.
The majority vote function and plane comparison function can, in that connection, be tested by successively temporarily changing the look of the data flows from the planes in a way that in the data flow from one plane at a time there is introduced a sequence of known test bit patterns.
A pattern detecting function can, in that connection, be connected to the output of the priority select function for sensing in the outgoing data flow said test bit pattern during determined sections of the data flow.
According to a very important embodiment, the plane condition sensing function receives a link condition indicating input signal for each
Bjenne Anders
Lundh Peter
Burns Doane Swecker & Mathis L.L.P.
Chin Wellington
Telefonaktiebolaget LM Ericsson (publ)
Tran Maikhanh
LandOfFree
Redundancy structure in a digital switch does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Redundancy structure in a digital switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Redundancy structure in a digital switch will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2508311