Semiconductor memory device having a monitoring pattern

Details Semiconductor memory device having a monitoring pattern Semiconductor memory device having a monitoring pattern

1998-09-18

1999-05-11

Tran, Andrew Q.

Static information storage and retrieval

Format or disposition of elements

365 63, 365201, 257 48, 257620, G11C5/02

Patent

active

059034890

ABSTRACT:
A semiconductor memory device has a memory cell area and a peripheral area including a scribe area. A large number of first monitoring patterns are disposed in the scribe area for monitoring the peripheral circuit in the peripheral area, whereas a few number of second monitoring patterns are disposed adjacent to the memory cell area for monitoring the characteristics of the memory cells. A CMP process which reduces the thickness of the memory device does not generate dust of the conductive material from the scribe area because the first monitoring pattern has a level substantially equal to the level of the peripheral area.

REFERENCES:
patent: 5285082 (1994-02-01), Axer
patent: 5771200 (1998-06-01), Cho et al.
"Nikkei Micro-device", pp. 56-58, May 1995.
"Nikkei Micro-device", pp. 77-84, Feb. 1992.
"Semiconductor World", pp. 99-101, Feb. 1995.

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