Level shifting circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S319000

Reexamination Certificate

active

06177824

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and relates more specifically to a level shift circuit in an electrically writable and erasable semiconductor device such as a nonvolatile semiconductor memory device.
2. Description of the Related Art
Conventionally, semiconductor devices such as nonvolatile semiconductor memory store information by inserting and removing electrons to and from floating gates. To accomplish this, a potential difference of approximately 20V must be given between a control gate and a drain. This, however, requires that the high voltage of the transistors used in the circuits of the semiconductor device be increased in order to operate at 20V. Transistor size thus increases.
A recent trend in semiconductor device design is to integrate a negative power supply into the semiconductor device and thereby relatively lower the power supply voltage Vdd that is used. More specifically, by lowering the power supply voltage used, the semiconductor device can be designed with low voltage transistors, and transistor size decreases as a result.
For example, 11 V is given to the drain and −9V is given to the word line to remove an electron from a floating gate. On the other hand, when an electron is not to be removed, 0V is given to the word line.
A circuit that operates at approximately 3 V (Vdd) is commonly used to control whether −9V or 0V is supplied. Therefore, either a level shifting circuit or a switching circuit for converting the control signal having 0V or 3V to a signal having 0V or −9V is needed. This type of level shifting circuit and switching circuit is well known from the literature.
It is generally not possible using a level shifting circuit to convert a plurality of control signals having a range 0V to the power supply voltage Vdd to signals having a range 0V to −9V in a single operation. An intermediate circuit for bridging these conversions is therefore needed. An optical coupling means is used as such an intermediate circuit. The optical coupling means is able to convert the control signals having a range 0V to Vdd to an optical signal. A circuit for converting to the signals having a range 0V to −9V receives the optical signals to convert the control signal. However, to incorporate an optical coupling means into a semiconductor device, a separate manufacturing process or other semiconductor is required, as a result, semiconductor device is manufactured at a high cost.
It is also possible to provide an intermediate level shifting circuit before a level shift circuit for converting to the signals having a range 0V to −9V. In this case, the control signals having a range 0V to Vdd are first converted to a signal varying from −9V to Vdd, and then the signal is converted to the signal having a range 0V to −9V by the level shifting circuit. In order to convert input signals having a range 0V to Vdd to signals having a range 0V to −9V, it is thus necessary to first use an intermediate level shifting circuit for temporarily converting to the signal having a range −9V to Vdd and for setting an area overlapping in the voltage conversion range before and after conversion.
However, for this intermediate level shifting circuit handles voltages having a range −9V to Vdd, a transistor having a high voltage (break down voltage) within a range Vdd to (Vdd+9V) must be used. Accordingly, it is impossible to achieve the objective of a low voltage.
A method of resolving this problem by using a negative power supply having −4V so that the operating voltage of the intermediate level shifting circuit is from −4V to the power supply voltage Vdd is also known from the literature.
However, because the amplitude of the intermediate level shifting circuit is from the power supply voltage Vdd to −4V, an intermediate circuit having a intermediate voltage −4V is needed. That is, while the required voltages are 0V and −9V, switching in one step from 0V to −9V is not possible. The intermediate level shifting circuit converts therefore a voltage from the power supply voltage Vdd to −4V, and then a conversion circuit (a second stage level shifting circuit) converts the intermediate voltage from 0V to −9V, to lower the required junction break down voltage level.
A level shifting circuit is therefore required for converting from the power supply voltage Vdd to −4V, and two level shifting circuits thus become necessary. A charge pump that is otherwise unnecessary is required for outputting −4V, and the required circuit scale and power consumption inevitably increase.
SUMMARY OF THE INVENTION
An object of the present invention is therefore to provide a semiconductor device comprising a level shifting circuit in which transistor high voltage is low without using an extraneous charge pump.
To achieve this object, a semiconductor device having a level shifting circuit for controlling an output signal level according to an input signal, where the level shifting circuit comprises a first-conductive type transistor to which an input signal is given, and a second-conductive type transistor to which is input the output signal from the first-conductive type transistor, is characterized according to the present invention by the level shifting circuit further comprising a control means for controlling operation of the first-conductive type transistor, and a voltage relieving means for suppressing a voltage given to the second-conductive type transistor.
Thus comprised, the operation of the first-conductive type transistor to which an input signal is given is controlled by the control means, and the voltage given to the second-conductive type transistor to which the output signal of the first-conductive type transistor is input is suppressed by the voltage suppressing means. It is therefore possible to achieve a level shifting circuit having low voltage transistors without using an otherwise unnecessary charge pump.


REFERENCES:
patent: 4689504 (1987-08-01), Raghunathan et al.
patent: 4996443 (1991-02-01), Tateno
patent: 5619150 (1997-04-01), Briner
patent: 5933043 (1999-08-01), Utsunomiya et al.
patent: 6049243 (2000-04-01), Mihara et al.
patent: 0 703 665 (1996-03-01), None
patent: 0 765 035 (1997-03-01), None
patent: 0 798 860 (1997-10-01), None
“5-Volt Signal Level Shifter in a 3-Volt CMOS Circuit,” IBM Technical Disclosure Bulletin, (XP000078153), vol. 32, No. 7, pp. 454-455 (Dec. 1, 1989).

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