Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
1998-10-08
2001-01-09
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180
Reexamination Certificate
active
06172908
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a controlled hot-electron writing method for non-volatile memory cells. In particular, for the purposes of the present patent, the term “writing” indicates programming of the cell from an erased condition to a condition for storing a desired threshold value, and the operation of “soft-writing” means correcting the threshold voltage of overwritten cells (which involves the partial re-writing of the cells so as to set them all to the same erase threshold voltage).
BACKGROUND OF THE INVENTION
As is known, non-volatile memories are becoming increasingly important in modern-day microelectronics, both as separate components and as components forming part of more complex devices; in this context, flash memories play a leading role, which is expected to increase significantly in the future.
Flash memories (as well as EPROMs) use the technique of hot electron injection for programming of the cells. As is known, programming presents two problems which are particularly critical in the case of multilevel programming used to store more than one bit for each cell: a) accurate control of the programmed threshold voltages; and b) control and limitation of the drain current flowing in the cell during programming.
The second problem, in particular, directly affects the possibility of operating in parallel on a large number of cells, which is of crucial importance for the operation of “soft-writing” erased flash cells. In general, however, this control function is important for achieving an increase in the performance during the storage of information.
In general, limitation of the cell current represents only one aspect of the more complex problem of controlling the current since, in order to optimize writing, the drain current should theoretically remain constant during the entire operation, so as to avoid high initial current peaks, followed by lower currents, which result in inefficient programming.
On the other hand, the problem of accurately controlling the programmed threshold voltage is important for digital memories and is absolutely crucial for multilevel storage, in view of the limited margins which separate the various levels within the available threshold window.
At present, in order to control the threshold after a programming stage, a verify operation consisting of reading the programmed cell is carried out. This method, however, involves a long and complicated procedure as well as a considerable use of space; consequently, the possibility of controlling in an accurate and reliable manner the threshold voltage of the cell during programming would be highly desirable.
The conventional writing procedure used for the present generation of flash memories (and EPROMs) uses rectangular pulses for the control gate and drain voltages (V
cg
and V
d
, respectively); consequently, programming is characterized by high drain currents, in particular at the start of the programming pulse, when the overdrive voltage (i.e., the difference between the control gate voltage and the threshold voltage) is high.
Some solutions have therefore been proposed in order to limit the drain current and/or control the overdrive current, but none of them achieves the ideal result of programming the cell with a constant current.
SUMMARY OF THE INVENTION
An object of the invention is therefore to provide an improved writing method for flash memories able to operate with a constant drain current, at least for a substantial part of the programming time.
According to the present invention, a controlled hot-electron writing method for non-volatile memory cells is provided. The method includes applying appropriate biasing voltages to a drain and control gate of a non-volatile memory cell and, at the same time, holding a floating gate voltage substantially constant during at least part of the time during which the non-volatile cells are being programmed.
According to the detailed description given below, in order to optimize writing of the cell, the latter is written in an equilibrium condition, with a constant floating gate region voltage and currents. In particular, both for programming and soft-writing after erasing, the substrate region of the cell is biased at a negative voltage with respect to the source region, and the control gate region of the cell receives a ramp voltage having a slope selected so that it is possible to achieve the condition of an equilibrium between the injection current flowing towards the floating gate region and the displacement current associated with the equivalent capacitor arranged between the floating gate and control gate regions.
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Cappelletti Paolo
Esseni David
Ricco Bruno
Galanthay Theodora E.
Hoang Huan
Iannucci Robert
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
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