Instruction control mechanism for a computing system with regist

Details Instruction control mechanism for a computing system with regist Instruction control mechanism for a computing system with regist

1990-04-23

1991-02-12

Anderson, Lawrence E.

Boots, shoes, and leggings

3642463, 3642443, G06F 900, G06F 1531, G06F 1202

Patent

active

049929380

ABSTRACT:
A floating point instruction control mechanism which processes loads and stores in parallel with arithmetic instructions. This results from register renaming, which removes output dependencies in the instruction control mechanism and allows computations aliased to the same register to proceed in parallel.

REFERENCES:
patent: 4378590 (1983-03-01), Kim
patent: 4493020 (1985-01-01), Kim et al.
patent: 4574349 (1986-03-01), Rechtschaffen
patent: 4736288 (1988-04-01), Shintani et al.
patent: 4752873 (1988-06-01), Shonai et al.

Affiliated with

Also associated with

Rating

Instruction control mechanism for a computing system with regist does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Instruction control mechanism for a computing system with regist, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Instruction control mechanism for a computing system with regist will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-24975