Semiconductor device

Details Semiconductor device Semiconductor device

1999-06-02

2001-01-30

Wells, Kenneth B. (Department: 2816)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With provision for cooling the housing or its contents

C257S720000, C257S727000

Reexamination Certificate

active

06181007

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device, and in particular to a pressure contact type semiconductor device in which a plurality of insulated gate bipolar transistors (IGBT) are incorporated in the same flat package.
BACKGROUND OF THE INVENTION
Insulated gate bipolar transistors (IGBT) have been widely used as power switching devices in such applications, for example, as motor PWM (pulse width modulation) control inverters. The IGBT is a voltage driven type device, which is easy to handle as compared with a current driven type device, and therefore there has been a strong demand in the market for an increase in the current capacity of the IGBT. To meet with the demand of the market, a modular structure has been employed in which a plurality of IGBT chips are integrated together within the same package. In a MOS control type device, such as an IGBT, an emitter electrode and a gate electrode are located side by side on the main surface of a semiconductor chip. In general, when such IGBT chips are incorporated or mounted in a package or case, a collector electrode formed on the lower surface of each chip is soldered to a support plate as a metallic base that also serves as a heat radiator, and connected to an external conductor, while the emitter electrode and gate electrode are separately connected to external lead terminals through bonding wires, or the like. The bonding wires consist of aluminum lead wires having a diameter of about 300 &mgr;m, and therefore heat dissipation mainly takes place at one surface on which the collector electrode is formed, thus resulting in reduced efficiency and reduced operating reliability.
In view of the above situation, there has been proposed a pressure contact type IGBT in which a plurality of IGBT chips for achieving a larger current capacity are mounted in a flat package having an insulating outer sleeve made of a ceramic material, in a similar manner to conventional thyristors or GTO (gate turn-off) thyristors.
Here, a known IGBT having a flat structure as proposed in Japanese Patent Application No. 8-79743 will be described.
FIG. 4
shows a cross section of a principal part of the known IGBT having a flat structure. In
FIG. 4
, a plurality of IGBT chips
102
are mounted in a single package
101
. Each IGBT chip
102
has an emitter contact terminal block
104
made of molybdenum, which block is accurately positioned by a positioning guide
103
having an insulating property. The emitter contact terminal blocks
104
of the respective IGBT chips
102
are in contact with a single thermal buffer plate
105
also made of molybdenum, and the buffer plate
105
is in contact with an upper common electrode plate
106
made of copper. The collector sides of the IGBT chips
102
are soldered to a single collector substrate
107
made of molybdenum, and the collector substrate
107
is in contact with a lower common electrode plate
108
made of copper. The upper common electrode plate
106
and the lower common electrode plate
108
are secured to an insulating sleeve
109
made of a ceramic material, to thus provide a package
101
. A pressure contact type semiconductor device having desired current-carrying characteristics is fabricated by applying a pressure from the upper and lower sides of the upper common electrode plate
106
and lower common electrode plate
108
, respectively, to the whole assembly of the thermal buffer plate
105
, emitter contact terminal blocks
104
, IGBT chips
102
, and the collector substrate
107
.
The pressure contact type semiconductor device having the flat structure as described above exhibits excellent electric conductivity and thermal conductivity due to the use of copper for the upper common electrode plate
106
and lower common electrode plate
108
. Also, the emitter contact terminal blocks
104
and collector substrate
107
are made of molybdenum whose coefficient of thermal expansion is close to that of silicon, and therefore thermal stresses applied to the IGBT chips
102
can be desirably alleviated or reduced. Furthermore, the thermal buffer plate
105
that is made of hard molybdenum and inserted between the emitter contact terminal blocks
104
and the upper common electrode plate
106
can suppress or reduce extraordinary strains, which would otherwise arise in the IGBT chips
102
when the emitter contact terminal blocks
104
bite into and are pulled by the upper common electrode plate
106
having a large coefficient of thermal expansion during heat cycles. Thus, the pressure contact type IGBT has a high resistance to power cycles (in which current intermittently flows through a load), which is five times or more as high as that of the bonding-type modular structure.
The above type of IGBT is constructed such that a plurality of IGBT chips are secured to the single collector substrate
107
. Where at least one defective IGBT chip is present among the IGBT chips mounted in the package, the whole IGBT becomes a defective, resulting in a reduced yield in the manufacture of IGBT. In order to improve the manufacturing yield, another type of IGBT having a flat structure as disclosed in Japanese Patent Application No. 7-328462 has been proposed.
FIG. 5
shows a cross section of a principal part of the IGBT as disclosed in the above-identified application. As shown in
FIG. 5
, each IGBT chip
111
is soldered to a collector substrate
112
to provide a semiconductor element. The semiconductor element and an emitter contact terminal block
114
are fitted in a positioning guide
113
, so as to provide a single semiconductor unit. A plurality of such semiconductor units are arranged in contact with each other within a frame
115
, and an upper common electrode plate
116
and a lower common electrode plate
117
are disposed on the upper and lower surfaces of the semiconductor units. Also, outer peripheral portions of the upper and lower common electrode plates
116
,
117
are closed by an insulating outer sleeve
118
, to thus provide a single IGBT.
Where at least one defective is present among the plural semiconductor units arranged in the above manner, the defective semiconductor unit may be easily replaced by a non-defective one, so as to provide a non-defective IGBT. This leads to an improved yield in the manufacture of IGBT, and reduced manufacturing cost.
The flat type IGBT having the known structure as shown in
FIG. 4
, however, suffers from a problem that the IGBT chips are broken in a power cycle test. More specifically, the coefficient of thermal expansion of the upper and lower common electrode plates having large areas is different from the coefficient of thermal expansion of the collector substrate similarly having a large area, and the emitter contact terminal block makes a seesaw motion on the surface of the corresponding IGBT chip, due to the difference in the coefficients of thermal expansion, thus causing a thermal stress at the interface between the emitter contact terminal block and the IGBT chip. In particular, the thermal stress is concentrated at the surface of the IGBT chip in the vicinity of the outer periphery or edge of the emitter contact terminal block, with the result of breakage of the IGBT chip. While the thermal stress is more or less suppressed by the thermal buffer plate between the emitter contact terminal blocks and the upper common electrode plate, the IGBT chips located in the peripheral portion of the device are particularly subjected to large thermal stresses, which cause a reduction in the service life of the IGBT.
In the IGBT as shown in
FIG. 5
, on the other hand, the collector substrate that contacts with the lower common electrode plate is provided for each semiconductor unit, and this structure, which is advantageous in terms of an improved yield in the manufacture of IGBT, provides a secondary effect of reducing thermal stresses and improving the resistance to power cycles. Where the semiconductor units are assembled together at room temperature, the positioning guides
113
of the respective semiconductor u

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