Stock material or miscellaneous articles – Structurally defined web or sheet – Discontinuous or differential coating – impregnation or bond
Reexamination Certificate
1999-03-29
2001-06-26
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
Structurally defined web or sheet
Discontinuous or differential coating, impregnation or bond
C428S212000, C428S213000, C257S772000, C438S612000, C438S653000, C438S654000, C438S656000
Reexamination Certificate
active
06251501
ABSTRACT:
TECHNICAL FIELD
The present invention generally relates to surface mount (SM) circuit devices. More particularly, this invention relates to a solder bumping method for a surface mount device, which includes plating a solder material on a plating seed layer covering an under bump metallurgy (UBM).
BACKGROUND OF THE INVENTION
Surface mount (SM) semiconductor devices such as flip chips typically include an integrated circuit and bead-like terminals formed on one of their surfaces. The terminals are typically in the form of solder bumps near the edges of the chip, and serve to both secure the chip to a circuit board and electrically interconnect the flip chip circuitry to a conductor pattern on the circuit board. The circuit board may be a ceramic substrate, printed wiring board, flexible circuit or silicon substrate, though other substrates are possible. Due to the numerous functions typically performed by the microcircuitry of a semiconductor device, a relatively large number of solder bumps are required. The size of a typical flip chip is generally on the order of a few millimeters per side, resulting in the solder bumps being crowded along the edges of the chip.
Because of the narrow spacing required for the solder bumps and their conductors, soldering a flip chip or other SM semiconductor device to a conductor pattern requires a significant degree of precision. Reflow solder techniques are widely employed for this purpose, and entail precisely depositing a controlled quantity of solder on the bond pads of the chip using methods such as electrodeposition and printing. Once deposited, heating the solder above its liquidus temperature serves to form the characteristic spherical-shaped solder bumps on the pads. After cooling to solidify the solder bumps, the chip is soldered to the conductor pattern by registering the solder bumps with their respective conductors and then reheating, or reflowing, the solder so as to form solder bump connections that metallurgically adhere to the conductors.
Flip chip input/output pads are electrically interconnected with the circuitry on the flip chip through vias. Because aluminum metallization is typically used in the fabrication of integrated circuits, input/output pads are typically aluminum or aluminum alloy, which are generally unsolderable and susceptible to corrosion if left exposed. Consequently, bond pads are often formed to include the aluminum input/output pad and one or more additional metal layers that promote wetting and metallurgical bonding with solder bump alloys. These additional metal layers, or under bump metallurgy (UBM), may be, for example, electroless nickel and a top layer of gold that will readily wet and bond with typical tin-lead solder alloys. Another suitable UBM composition has a multilayer structure that includes an adhesion-promoting layer, a diffusion barrier layer, and a solderable layer. The adhesion layer may be aluminum or another metal composition that will bond to the underlying aluminum input/output pad. Copper is readily solderable, i.e., can be wetted by and will metallurgically bond with solder alloys of the type used for solder bumps, and therefore is a common choice for the solderable (top) layer of the UBM. The diffusion barrier layer is typically a nickel-vanadium or chromium-copper alloy, and is disposed between the adhesion and solderable layers to inhibit diffusion between the solder and aluminum pad. A NiV and CrCu layer also serves as a wettable layer if an overlaying copper layer is dissolved into the solder.
Placement of the chip and reflow of the solder must be precisely controlled not only to coincide with the spacing of the bond pads and the conductors to which the solder bumps are registered and reflow soldered, but also to control the height of the solder bump connections after reflow. As is well known in the art, controlling the height of solder bump connections after reflow is often necessary to prevent the surface tension of the molten solder from drawing the flip chip excessively close to the substrate during the reflow operation. Sufficient spacing between the chip and its substrate, often termed the “stand-off height,” is desirable for enabling stress relief during thermal cycles, allowing penetration of cleaning solutions for removing undesirable processing residues, and enabling the penetration of mechanical bonding and encapsulation materials between the chip and its substrate.
Control of solder bump position, height and pitch are dictated in part by the manner in which the solder is deposited on the bond pads. One known technique is to use a photoimagable dry film as a stencil for printing a solder paste on the bond pads of a flip chip. The location and size of the solder bumps are determined by the vias in the dry film, which contain the solder during reflow. With relatively large bump spacings and conventional solders, this process is reliable and cost effective. However, for relatively fine pitches, vias can be difficult to form in a dry film, and it is difficult to get a uniform distribution of solder paste into a small via. Finally, solder compositions that can be used with this method are limited to those with reflow temperatures at or below the maximum temperature the dry film material can withstand and still be removed after reflow.
Finer solder bump pitches can generally be obtained with plating methods. One such technique involves depositing metal films on the semiconductor wafer, forming a plating mask, electroplating a minibump of a solderable material, electroplating a layer of solder, and then removing the mask and the exposed metal films. The minibump and that portion of the metal film remaining beneath the solder serve as a UBM. A disadvantage to this approach is that chemistries used to remove the metal film between solder bumps must be compatible with and not degrade the bumps.
From the above it can be seen that, while fine solder bump pitches can be attained by plating techniques, process and material compatibilities between UBM formation, solder bump formation and reliability are limitations. Accordingly, it would be desirable if an improved method were available for forming fine-pitch solder bumps on flip chips and other SM semiconductor devices that employ solder bumps.
SUMMARY OF THE INVENTION
According to this invention, a solder bumping method and structure are provided that achieve fine solder bump pitches and eliminates conventional process compatibility requirements for UBM and solder bump formation. The method generally entails forming an input/output pad on the surface of a semiconductor device, and then forming a metal layer on the input/output pad that will serve as the UBM of the solder bump. A plating seed layer is then formed on the UBM and on the surrounding surface of the device, after which a mask is formed on the plating seed layer and a via is formed in the mask to expose a portion of the plating seed layer overlying the UBM, and preferably portions of the plating seed layer not overlying the UBM. A solder material is then deposited on the portion of the plating seed layer exposed within the via. Because the via is not limited by the size of the UBM, the deposited solder material is able to cover an area larger than the metal layer, thereby increasing the amount of solder material available to form the solder bump.
The result of the above process is a semiconductor device having input/output pads covered by a UBM, a plating seed layer on the UBM and on the surrounding surface of the device, a mask having a via that exposes a portion of the plating seed layer, including that which overlies the UBM, and solder material on the plating seed layer within the via. At this point, the mask and that portion of the plating seed layer not covered by the solder material can be removed using the solder material as a mask. The solder material can then be reflowed to form the solder bump, causing the remaining portion of the plating seed layer to dissolve into the solder bump.
From the above, it can be seen that the solder bump structure and process o
Higdon William David
Yeh Shing
Delphi Technologies Inc.
Funke Jimmy L.
Jones Deborah
Young Bryant
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