Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
1997-08-05
2001-06-12
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S110000, C438S613000, C438S672000
Reexamination Certificate
active
06245594
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a flip-chip semiconductor die assembly and, more particularly, to micro-size bumps and recessed contacts for self-aligned contact of the die to a substrate, and specifically to methods for forming the bumps and mating contacts.
2. State of the Art
As the complexity of integrated circuits on semiconductor dice has increased, semiconductor die manufacturers and assemblers have found a correspondingly increased need for improved input and output connections. A flip-chip arrangement is one conventional arrangement used to take advantage of its potentially higher number of arrayed input and output connections; that is, more such connections can be placed on the active surface of a die than with wire-bonding, TAB, or other conventional connection techniques. In a conventional wire bonded arrangement, the number of connections that can exist in a given surface area of a die is limited because of the diameter of the wire ball to be formed from the bond wire at the connection point or bond pad on the die surface, as well as by the number of wires which can be extended from bond pads to a lead frame or carrier substrate without shorting. The pitch, or nominal distance between the center of any two connection points, is generally limited to approximately 0.1 mm, although some arrangements have achieved a pitch of as low as 0.08 mm. Simply put, the wire balls are too bulky to allow a more dense array of connections, and potential mutual interference by the wires limits the usable patterns of such connections.
By contrast, a conventional solder-bumped flip-chip arrangement allows a high density of connections per given area of active surface on the die, and the least amount of die-to-carrier connection time because of the ability to effect all connections simultaneously. In a conventional flip-chip arrangement, solder bumps are formed or deposited on a semiconductor die, and the die (“chip”) is turned over, i.e. flipped, and then aligned with mirror-image solder bumps or bond pads on another die, or terminal pads of a die carrier or a printed circuit board or other, similar carrier substrate. By reflowing the solder after contact of the bumps with the pads or cooperating bumps on the mating component of the assembly being fabricated, a simultaneous electrical, mechanical, and thermal connection of each cooperating pair of contact points is achieved. Since bump size can, with some techniques, be smaller than wire ball size and bumps can, in some instances, be placed more accurately than wire balls, the potential density of bumps can exceed that of wire bonds, reaching a corresponding pitch of as low as 0.01 mm. Nevertheless, bump pitch is limited by the selection of bump size, bump shape, and bond pad metallization characteristics. As detailed below, when an improper combination of these elements is selected, the bumps may spread outward too far and form unwanted connections to other bond pads during reflow of the solder.
One of the first solder-bumped flip-chip arrangements was created using so-called Controlled Collapse Chip Connection (C4) technology. The technology involves, first, laying down a passivation layer on the surface of a semiconductor die which covers the bond pads where connections will be made between the die and a substrate. Next, holes are formed in the passivation layer over the bond pads and one or more layers of metallization are typically deposited over the exposed bond pads. Finally, solder bumps (typically of a tin/lead alloy, although other alloys are sometimes employed) are deposited on the metallized areas and a preliminary reflow performed so that the bumps take on a semi-spherical shape. Later, after alignment with terminal pads of conductive traces of a substrate, a final reflow will form the permanent die-to-substrate electrical connections. The metallization deposited on each bond pad must be limited in circumference to the approximate size of the hole through which it contacts the bond pad. However, the metallization may extend up the walls of the hole in the passivation layer through which the bond pad is exposed, and onto the top surface of the passivation layer, although obviously avoiding contact with neighboring bond pad metallization.
One purpose of the metallization layer interconnecting the bump and the bond pad on the underlying active surface of the die is to provide improved solder adhesion to the bond pad. Another purpose is to control the contact area the bump will cover on the die surface by use of a very solder-wettable metal or alloy on the exposed surface of the metallization. The intent is to prevent the solder from spreading beyond the circumference of the deposited metallization. By controlling the contact area, the metallization partially controls the bump's height, since the bump will form a semi-sphere with a size somewhat dependent on the circumference of the metallized area on which it resides, as well as on the volume of the bump material. Understandably then, the metallized area is sometimes referred to as Ball-Limiting Metallurgy (BLM). If the volume of deposited solder becomes too large for a given contact area metallization, then the surface tension of the particular solder composition used will be insufficient to contain the molten solder in spherical form and the solder will overflow the metallization despite its presence. Even if the surface of the die is additionally coated with a low-surface tension material to inhibit spreading of the reflowed solder from the BLM, the effectiveness of such coatings is limited. The coating will probably help prevent incidental outflows from the BLM, unless a bump is too large and exceeds the surface tension of the molten solder. In that case, a low-surface tension coating will probably be insufficient to contain all of the escaping solder and avoid contact with another bond pad located nearby in a fine-pitch array. Thus, bump volume and pitch must be carefully considered and controlled to prevent defects in flip-chip connections.
The use of solder bumps to form connections between two dice, a die and a printed circuit board or other carrier substrate, or a carrier substrate and a higher-level package is well-known in the art. However, even though BLM is used on components of such assemblies carrying the solder bumps, the spacing or “pitch” of the bumps is limited by conventional technologies due to problems with preventing the bumps from flowing together during reflow of the solder. Many variations in the materials used in a C4 process and in the detailed process steps exist, since users have sought to match the technology to their particular applications, to meet reliability requirements, and to improve production efficiency and connection quality. The significant number of these variations is indicative of the complexity of conventional methods for forming solder bumps on dice and the number of problems inherent in the conventional methods. The complexity of forming adequate solder bump connections is further exemplified by the methods disclosed in U.S. Pat. Nos. 4,940,181; 5,477,086; 5,480,835; 5,492,235 and 5,505,367. The complexity of such methods contributes to the typical, relatively high cost of manufacturing solder-bumped dice, particularly as attempts are made to form smaller bumps with hopes to achieve a more densely-packed array of connections.
After forming bumps on a semiconductor die, the die must then typically be connected to another die, or to a printed circuit board or other carrier substrate. As indicated earlier, the die bumps are aligned with mirror-image terminal pads or solder bumps on the substrate to make the connection. Substrate bumps may generally be formed by the same methods used to form die bumps. However, the substrate bumps often possess a designed shape so as to facilitate aligning of the die bumps and making a reliable connection. In some instances, bumps of metals other than solder are employed, and connections are effected by means other than a reflow. In add
Akram Salman
Jiang Tongbi
Wu Zhiqiang
Chambliss Alonzo
Chaudhuri Olik
Micro)n Technology, Inc.
TraskBritt
LandOfFree
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