Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-11-15
2001-07-24
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S064000
Reexamination Certificate
active
06265244
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for mounting semiconductor elements, and more particularly, to a method for mounting semiconductor elements by connecting semiconductor elements with a wiring substrate using flip-chip mounting.
2. Description of Related Art
A flip-chip bonding method, known as one of semiconductor element assembling techniques, is a method for connecting a solder bump on an electrode provided on the bottom surface of a semiconductor element with a facing solder bump on a connecting pad provided on the upper surface of a wiring substrate. Since flux was used in the conventional flip-chip bonding method, the oxide film on the surface of the solder bump was removed facilitating connection using solder. However, this method had a problem in that the flux remained as a residue after the cleaning step unless the quantity of the flux was optimized, or the cleaning step was properly controlled, and the residue of the flux interfered with the injection of the sealing resin in the following step. Furthermore, this method had another quality assurance problem in that the residue of the flux induced the occurrence of migration lowering the reliability of connection.
As described above, since flux is used in the conventional flip-chip bonding method, the method had a problem of the lowered reliability of connection due to the residue of flux remaining after the cleaning step.
SUMMARY OF THE INVENTION
In order to solve the above-described problems, an object of the present invention is to provide a method for mounting semiconductor elements without lowering the reliability of connection due to the residue of flux by using a flip-chip bonding method eliminating the use of flux for connecting the semiconductor elements with the wiring substrate.
According to a first aspect of the present invention, there is provided a method for mounting semiconductor elements comprising the steps of forming a solder bump on either semiconductor elements or a wiring substrate; heating the semiconductor elements and the wiring substrate to a predetermined preheating temperature lower than the melting point of the solder; pressure-welding the semiconductor elements on the wiring substrate via the solder bump; melting the solder bump formed on the semiconductor elements or the wiring substrate by heating the semiconductor elements to a temperature of or above the melting point of the solder in the state where the semiconductor elements have been pressure-welded on the wiring substrate; rhythmically moving the semiconductor elements periodically in either a horizontal direction or a vertical direction; and cooling the semiconductor elements to a predetermined cooling temperature lower than the melting point of the solder.
The above and other objects, effects, features and advantages of the present invention will become more apparent from the following description of the embodiments thereof taken in conjunction with the accompanying drawings.
REFERENCES:
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patent: 4996589 (1991-02-01), Kajiwara et al.
patent: 5133403 (1992-07-01), Yokomo et al.
patent: 5821627 (1998-10-01), Mori et al.
patent: 2-285651 (1990-11-01), None
patent: 5-190601 (1993-07-01), None
patent: 6-124980 (1994-05-01), None
patent: 8-222846 (1996-08-01), None
Hayashi Eiji
Tomita Yoshihiro
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
Nhu David
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