Rcb cancellation in low-side low power supply current sources

Details Rcb cancellation in low-side low power supply current sources Rcb cancellation in low-side low power supply current sources

1998-12-21

2001-08-07

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C323S316000

Reexamination Certificate

active

06271716

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a circuit for minimizing the current leakage associated with a phase-lock-loop filter necessary for high speed clock generators used in advanced digital systems. More particularly, the present invention provides a novel circuit for reducing the effect associated with the Rcb leakage path inherent in the low side current source transistor of the PLL filter.
BACKGROUND OF THE INVENTION
High speed digital systems, such as engineering workstations and personal computers, require clock sources to provide a timing reference. It is imperative that these timing references be highly accurate and stable. Otherwise, the performance of the digital systems relying on these clock sources would be impaired. One method for achieving a clean, fast, and accurate clock source is to use a crystal oscillator coupled with a phase-lock-loop (PLL) circuit to regulate its frequency. In this type of arrangement, the goal then is to design the PLL such that it exhibits low jitter and high bandwidth in order to generate an optimal clock signal.
The PLL circuitry in the clock generator typically contains a voltage controlled oscillator (VCO) that receives a voltage level maintained by filter components. Normally, charging currents and voltage controlled oscillator gains are so high that externally situated filter components are required to external, e.g., “off-chip,” filter components (e.g., capacitors, etc.) increase the overall cost of the digital system in part by making manufacturing more complex, and also increase the physical size of the digital system. Furthermore, off-chip filter components also decrease system reliability by increasing the phase jitter by allowing external noise to be injected into the clock circuit through the PLL filter. Clock jitter is reduced if external elements of the PLL loop filter can be eliminated. To integrate filter components “on-chip,” it is necessary to use smaller sized filter components. However, this leads to tighter filter leakage requirements because smaller sized capacitors are more sensitive to changes in current when compared to larger sized capacitors.
It is desired to reduce the effects of leakage current within a PLL circuit because, as discussed above, on-chip filter components are very sensitive to small leakage currents. PLL filters are normally driven by current source circuits and require outputs having a very high impedance. A problem exists in eliminating off-chip filters and placing them on-chip. Namely, reducing the size of the filters (thereby allowing them to be placed on-chip) unfortunately makes these components more sensitive to leakage current which impedes the ideal operation of certain PLL circuits. As a result, it is desired to use buffer circuits that have reduced leakage current to drive differential filters for higher PLL accuracy. At the same time, this circuitry needs to operate from increasingly lower power supply voltages, e.g., to accommodate hand-held and other portable battery operated applications. integrated on the same chip, which reduces cost and minimizes its susceptibility to external noise and other interferences, while also minimizing the effects of current leakage, thereby reducing clock jitter and maintaining tight PLL bandwidth requirements.
SUMMARY OF THE INVENTION
The present invention pertains to a highly stable current source circuit. Basically, the present invention provides a mechanism whereby the leakage current inherent to a transistor used in the current source is first detected and then an equal but opposite amount of current is fed back in order to effectively cancel out the leakage current. The net effect is as if there were no leakage current at all, thereby providing a highly stable current source. This current source circuit is ideal for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. For example, a more stable current provided into the capacitor of the phase-lock-loop will ultimately result in reducing unwanted clock jitter. Furthermore, a more stable current means that the capacitor can be made smaller because its voltage can be maintained at a constant level. In turn, this enables the phase-lock-loop to be fabricated on-chip with the rest of the clock generator, thereby minimizing its susceptibility to external noise and interferences.
In the currently preferred embodiment of the present invention, the current source circuit comprises a resistor coupled to ground. The emitter of a transistor is coupled to the resistor; the base is coupled to a bias voltage; and the collector is coupled to a capacitor which is part of the filter elements of the phase-lock-loop. Current is sinked from the capacitor through the resistor and transistor to ground. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the transistor is directed to a path provided by a second transistor. The second transistor has an emitter coupled to the base of the first transistor and a collector coupled to the capacitor. The second transistor is biased such that the Rcb leakage current inherent to the first transistor is directed back into the capacitor. The Rcb leakage current flowing out from the capacitor through the first transistor is canceled by the current flowing back into the capacitor via the second transistor, thereby providing a highly stable current source.


REFERENCES:
patent: 5568045 (1996-10-01), Koazechi
patent: 5831471 (1998-11-01), Nakajima et al.
patent: 5955915 (1999-09-01), Edwards

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