Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-07-08
2001-07-24
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000, C361S783000, C439S066000
Reexamination Certificate
active
06265673
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element-mounting board with a semiconductor element mounted thereto by a flip-chip mounting method, a manufacturing method for the semiconductor element-mounting board, a semiconductor device using the semiconductor element-mounting board and a manufacturing method for the semiconductor device.
In accordance with the current rapid progress changing electronic appliances to be compact and high-performance, as represented by portable phones, personal computers, pager units, etc., a count of semiconductors used in each electronic circuit is increased. Meanwhile, the electronic circuit comes to use a frequency band as high as 1 GHz, whereby not only a processing speed of an integrated circuit (IC) itself, but a wiring length of the electronic circuit matters much. The IC is consequently being changed from a package IC to a bare IC and mounted by a flip-chip mounting method, not by a wire bonding method. In a chip size package (referred to as “CSP” hereinafter) as a typical form of the flip-chip mounting method, the semiconductor element is once mounted on a special board by the flip-chip mounting method, sealed and then finally mounted on a printed circuit board.
A flow of procedures in the aforementioned CSP mounting method and the structure of the CSP will be described with reference to the drawings.
FIG. 21
shows the structure of the CSP. A semiconductor element-mounting board
2
called as a carrier onto which a semiconductor element
23
is to be mounted by the flip-chip mounting method is manufactured by layering a plurality of ceramic boards according to the prior art. In the board
2
, the semiconductor element
23
is arranged at the side of a semiconductor element-mounting face
2
a
where electrodes
2
c
are formed, while a printed board is disposed at the side of a circuit board-mounting face
2
b
where bonding lands
18
are formed. An interlayer conduction part
5
is provided between layers of the semiconductor element-mounting board
2
so as to electrically connect the electrodes
2
c with the bonding lands
18
. Projecting electrodes
24
are formed on aluminum pads
23
a
of the semiconductor element
23
, which are electrically connected by a conductive paste
25
with the electrodes
2
c
at the semiconductor element-mounting face
2
a
of the board
2
. The semiconductor element
23
is electrically connected to the printed board in this manner. A connected part between the semiconductor element
23
and the semiconductor element-mounting board
2
is sealed by a sealant
26
.
In
FIG. 21
, a face provided with wirings of the semiconductor element
23
faces to the board
2
and therefore this way of mounting is denoted as a flip-(inverted) chip mounting. The semiconductor element-mounting board
2
is often formed in a multi-layer structure as indicated in the drawing so as to improve a wiring density through wirings between electrodes of the layers, which unfortunately increases a total wiring length in the semiconductor element-mounting board
2
.
The land
18
at the circuit board-mounting face
2
b
of the board
2
is formed larger in diameter than a via hole, thereby to compensate for a positional shift of the via hole. Although the bonding land
18
is flat in
FIG. 21
, metallic balls of solder or the like, or long pins are added to the lands in some cases, respectively called as a ball grid array (BGA) and a pin grid array (PGA).
FIG. 22
shows a process flow of the conventional CSP mounting. In step
1
(abbreviated as “S
1
” in FIG.
22
), the projecting electrodes
24
, i.e., bumps are formed on the aluminum pads
23
a
on an active face of the semiconductor element
23
. In step
2
, the projecting electrodes
24
are leveled. In step
3
, a required amount of the conductive paste
25
is transferred onto the projecting electrodes
24
. Then, the semiconductor element
23
is inverted in step
4
and, the projecting electrodes
24
with the conductive paste
25
are mounted to the electrodes
2
c
formed on the semiconductor element-mounting board
2
in step
5
. Thereafter, for preventing the semiconductor element
23
from being shifted or separated from the mounting board
2
, the conductive paste
25
is set in step
6
. The sealant
26
is injected between the semiconductor element
23
and the mounting board
2
in step
7
. When the sealant
26
is set in step
8
, the CSP is completed.
The electronic appliances these days are made compact, light-weight and thin through the above-described mounting technique.
The conventional semiconductor element-mounting board
2
has disadvantages as follows. While etching is preferred to form a fine wiring pattern to the semiconductor element-mounting face
2
a
and the circuit board-mounting face
2
b
of the board
2
, a special poisonous etching solution would be needed for the etching of the board
2
, because the conventional mounting board
2
is made of ceramic as mentioned earlier. As such, printing is utilized heretofore to form the wiring pattern on the surfaces of the board, in other words, the wiring pattern is difficult to be fine to match a pitch of the ICs. Moreover, since the bonding land
18
larger than the via hole should be formed on the circuit board-mounting face
2
b
of the board
2
, this makes it hard to satisfy the above fine pitch of the ICs. While the mounting board
2
is constituted of a plurality of layers and the wiring is provided between the layers in order to make up the aforementioned imperfect, not fine wiring pattern, a conduction resistance between the layers is unfavorably increased. Through holes are also necessary to form the interlayer conduction part
5
. Thus the conventional semiconductor element-mounting board
2
in a multi-layer structure with the wiring provided between the layers costs high and requires a long lead time, with poor mounting reliability onto the printed board.
SUMMARY OF THE INVENTION
The present invention is devised to solve the above-described disadvantages, and has for its object to provide a semiconductor element-mounting board, a manufacturing method for the board, a semiconductor device using the board and a manufacturing method for the semiconductor device, which is manufactured inexpensively, shows a low interlayer conduction resistance, fits to multi-pin ICs, improved in mounting reliability onto a printed board and productivity and shortens a manufacture lead time.
In accomplishing these and other aspects, according to a first aspect of the present invention, there is provided a semiconductor element-mounting board, comprising:
a base member which includes a semiconductor element-mounting face to which a semiconductor element is mounted and electrically connected by a flip-chip mounting method and a circuit board-mounting face opposite to the semiconductor element-mounting face and mounted to a circuit board, and which is formed of an electrically insulating resin material in one layer; and
conductive members which are nearly orthogonal to the semiconductor element-mounting face and the circuit board-mounting face and extend linearly penetrating an interior of the base member thereby to electrically connect the semiconductor element with the circuit board.
According to a second aspect of the present invention, there is provided a semiconductor element-mounting board according to the first aspect, wherein the conductive member is formed of a metallic wire.
According to a third aspect of the present invention, there is provided a semiconductor element-mounting board according to the first or second aspect, wherein the conductive member is formed of any one metal selected from a group consisting of Cu, Au, Al, Ag, Pd, and Pt, or an alloy mainly composed of one of the metals.
According to a fourth aspect of the present invention, there is provided a semiconductor element-mounting board according to any one of the first though third aspects, wherein the resin material is a liquid crystal polymer having a heat resistance of 250° C. or higher and a the
Higashida Takaaki
Kumagai Koichi
Matsuo Takahiro
Matsushita Electric - Industrial Co., Ltd.
Norris Jeremy
Paladini Albert W.
Wenderoth , Lind & Ponack, L.L.P.
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