Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
1999-07-09
2001-09-04
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S508000, C257S509000, C257S510000, C257S520000
Reexamination Certificate
active
06285066
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor devices, and in particular, to semiconductor devices having field isolation and processes for forming the devices.
BACKGROUND OF THE INVENTION
Many types of field isolation processes and structures currently exist. One common field isolation process is the local oxidation of silicon (LOCOS). Problems with conventional LOCOS field isolation include too much encroachment into active areas and too much of step height difference between the top of the field isolation regions and adjacent active regions. Modified versions of LOCOS (poly buffered LOCOS, sidewall masked field isolation, etc.) have been developed to reduce encroachment or reduce the step height difference but have other problems that include inducing generation of crystal defects during field oxidation, generation of substrate pits when oxidation-resistant structures are removed, increased process complexity, or the like. Modified versions of LOCOS still have at least some measurable encroachment. As used in this specification, conventional and modified versions of LOCOS field isolation regions are referred to as LOCOS-type field isolation regions.
Trench field isolation regions have little encroachment but large trench field isolation regions are difficult to form.
FIG. 1
includes an illustration of a cross-sectional view of a portion of a substrate
10
having a wide trench
12
and a narrow trench
14
where field isolation regions are to be formed. In one embodiment, trench
12
is 10 microns or wider, trench
14
is 0.5 microns wide, and both trenches are about 4000 angstroms deep. An insulating layer
16
overlies the surface of the substrate
10
to fill the trenches
12
and
14
. The of layer
16
must be at least as deep as trench
14
in order for it to be completely filled. Therefore, layer
16
is at least 4000 angstroms thick.
Etching cannot be used to form trench field isolation regions for the device shown in
FIG. 1
because the trench
12
is large. Isotropic etching would remove virtually all the insulating layer
16
within trench
12
. Anisotropic etching would form spacers from the insulating layer
16
. The spacers would lie along edges of trench
12
.
Trench field isolation regions are typically formed by chemical mechanical polishing. However, chemical mechanical polishing can result in dishing as shown in FIG.
2
. With dishing, more of the insulating layer
16
is removed from the center of trench
12
compared to the edges of trench
12
. Referring to
FIG. 2
, the thickness
20
is only a fraction of the depth of the trench
12
. In extreme cases, this thickness can be reduced to zero.
Hybrid LOCOS-trench field isolation regions are typically formed by steps including those used to form a conventional LOCOS field isolation process and a trench isolation process. These hybrid field isolation regions each include trenches and thick field oxide typically at least 2000 angstroms thick that is grown during a long thermal oxidation step. Besides process complexity, the hybrid field isolation regions could also have significant encroachment, crystal defects, step height differences, or the like. Simply put, hybrid LOCOS-trench field isolation regions have the problems of conventional LOCOS field isolation and additional steps from the trench isolation process. Both are undesired.
Therefore, a need exists for forming planar field isolation structures for narrow field isolation regions and wide field isolation regions on the same device without having any of the problems related to encroachment, step height differences, crystal defects, dishing, or the like.
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Lee Eddie
Meyer George R.
Motorola Inc.
Wilson Allan R.
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