Operational amplifier

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S257000

Reexamination Certificate

active

06215357

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a high-speed and low power consuming operational amplifier employed, for instance, for driving a circuit having a high input capacity such as an analogue to digital (referred to as “A/D”) converter or for fast driving a circuit having a low input impedance and, in particular, to those effective to applications which require of extremely low-power consuming operations among general purpose operational amplifiers.
2. Brief Description of the Related Art
Trends toward the low power dissipation, the high operational speed and the miniaturization of the components have been accelerated in response to the recent demands on thinning and down-sizing of equipment and to the technological progression. In the operational amplifiers which act as a sort of arithmetic circuits, the low power consumption and the extremely high operational speed have been achieved by means of a low supply voltage, an unbalanced power supply and a high density integration.
Constitutions shown in
FIGS. 6 and 7
have been known up to now as conventional output stages of the operational amplifiers.
FIGS. 6 and 7
are block diagrams for showing constitutions of the output stages of the operational amplifiers particularly in detail.
FIG. 6
illustrates a circuit which is constituted of bipolar transistors while
FIG. 7
illustrates the circuit which is constituted of metal-oxide-semiconductor (referred to as “MOS”) transistors. In
FIGS. 6 and 7
, a numeric character
1
stands for an operational amplifying circuit except for a high drivability output stage,
5
stands for a normal input signal terminal and
6
stands for an inverted input signal terminal. Output signals produced from the operational amplifier
1
are applied to of the output stage wherein the signals are transformed in impedance to be applied to an output signal terminal
7
. In either case, an emitter follower configuration or a source follower connection is biased with a constant current circuit
100
or
101
so that an idling current is kept constant. Such constitution of the output stage as mentioned above requires to allot large transistors in size to final stage transistors Q
6
, Q
12
, M
6
and M
12
in order to drive heavy loads which is connected to the output terminal
7
.
However, because aforesaid conventional examples require to drive either a base or a gate electrode of the large transistor in chip size with a constant current, it is necessary to enlarge the constant current value for accelerating the driving speed. Accordingly, there has been a problem that an increase in dissipated current obstructs a reduction in power consumption.
SUMMARY OF THE INVENTION
The present invention is carried out to solve the problem mentioned above. An object of the present invention is to provide a low power consuming operational amplifier which can drive a heavy load at high speed.
A first technology according to the present invention comprises:
detecting means for detecting a differential voltage between a normal input signal terminal and an inverted input signal terminal; and
current varying means for varying a current for biasing an output stage buffer in response to an output signal produced from the aforesaid detecting means.
A second technology according to the present invention is the first technology, wherein:
aforesaid detecting means for detecting the differential voltage is constituted of a differential amplifier.
A third technology according to the present invention is the second technology, wherein:
means for reducing a conductance gm is provided in the differential amplifier which is used as the detecting means for detecting the differential voltage.
A fourth technology according to the present invention is the first technology, wherein:
a bipolar transistor is included as a constituent.
A fifth technology according to the present invention is the first technology, wherein:
an MOS transistor is included as a constituent.
Further, a sixth technology according to the present invention provides an operational amplifier including:
an input stage having differential amplifying means; and
an output stage producing an certain driving power by means of constant current supply means; comprising:
detecting means for detecting a differential voltage between a normal input signal terminal and an inverted input signal terminal of aforesaid input stage; and
electric current varying means for varying a constant current supplied from aforesaid constant current supply means in response to an output signal produced from the detecting means.
A seventh technology according to the present invention is the sixth technology, wherein:
an output signal produced from aforesaid differential amplifying means drives aforesaid output stage as a single ended output signal;
aforesaid detecting means is formed of two transistors constituting a differential circuit of which base electrodes are applied with the respective input signals through the normal input signal terminal and the inverted input signal terminal;
each of aforesaid two transistors bears each current mirror circuit as a load;
one of aforesaid current mirror circuits drives one transistor of aforesaid output stage which is constituted as a complementary single ended push-gull (referred to as “SEPP”) circuit; and
another of aforesaid current mirror circuits drives another transistor of aforesaid output stage constituted as the complementary SEPP-type circuit through a still another current mirror circuit.
An eighth technology according to the present invention is the seventh technology, wherein:
emitter electrodes of aforesaid two transistors constituting the differential amplifying configuration are connected to each other by short-circuiting; and
aforesaid emitter electrodes are further connected through a constant current circuit to a reference potential point.
A ninth technology according to the present invention is the seventh technology, wherein:
each emitter electrode of aforesaid two transistors constituting the differential amplifying configuration is connected through each resistor to a constant current source which is further connected to a reference potential point.
A tenth technology according to the present invention is the seventh technology, wherein:
each emitter electrode of aforesaid two transistors constituting the differential amplifying configuration is connected through each constant current circuit to a reference potential point; and
aforesaid emitter electrodes are further connected to each other through a resistor.
An eleventh technology according to the present invention is the sixth technology, wherein:
an output signal produced from aforesaid differential amplifying means drives aforesaid output stage as a single ended output signal;
aforesaid detecting means is formed of two transistors constituting a differential circuit of which gate electrodes are applied with the respective input signals through the normal input signal terminal and the inverted input signal terminal;
each of aforesaid two transistors bears each current mirror circuit as a load;
one of aforesaid current mirror circuits drives one transistor of aforesaid output stage which is constituted as a complementary SEPP circuit; and
another of aforesaid current mirror circuits drives another transistor of aforesaid output stage constituted as the complementary SEPP-type circuit through a still another current mirror circuit.
A twelfth technology according to the present invention is the eleventh technology, wherein:
source electrodes of aforesaid two transistors constituting the differential amplifying configuration are connected to each other by short-circuiting; and
further connected through a constant current circuit to a reference potential point.
A thirteenth technology according to the present invention is the eleventh technology, wherein:
each source electrode of aforesaid two transistors constituting the differential amplifying configuration is connected through each resistor to a constant current source wh

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