Multi-stage techniques for accurate shutoff of circuit

Details Multi-stage techniques for accurate shutoff of circuit Multi-stage techniques for accurate shutoff of circuit

1999-09-30

2001-07-24

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S566000

Reexamination Certificate

active

06265925

ABSTRACT:

FIELD
The present invention relates, generally, to the field of reconfigurable circuits and, more particularly, to any type of switchably reconfigurable low-bias circuit which operates on either DC or AC.
BACKGROUND
In recent years, the scaling down of the sizes of active elements in semiconductor integrated circuits (ICs) has led to repeated significant increases in the level of integration of an IC chip, as well as compactness thereof. Correspondingly, the supply voltages of ICs, as well as voltage/current levels assigned to logic levels for operating integrated circuits have also been scaled down considerably. One reason for this is that parasitic resistances and capacitors associated with the signal lines have been significantly lowered as lengths of signal lines in ICs have been reduced and electrical isolation improved. With the scaling down of the active elements such as switching transistors, including, for example, a MOS transistor, a CMOS circuit, etc., the threshold voltage (Vt) associated with such switching transistors has been correspondingly scaled down also, thereby permitting the use of lower and lower logic voltage levels for switching ON and OFF the transistors.
Threshold voltages play an important role in the performance of low-voltage/low-power circuits. For example, conventionally, in order to achieve optimal performance in low voltage analog circuits, the threshold voltages and logic signal differentials would necessarily be adjusted with high accuracy, typically, in an upward direction to avoid the subthreshold region operation. However, this would be contrary to the efforts of scaling down of ICs. The phenomenon of subthreshold conduction (i.e., leakage) per se in MOSFETs has been known for some time and discussed on pages 210-212 in the text entitled
Advanced MOS Devices
by D. K. Schroeder, published 1987 by Addition-Wesley Publishing Co. As logic levels have continued to be lowered, what was considered as previously negligible leakage current levels in connection with higher threshold switching schemes now plays a significant role, the inventors found, in the operation of low voltage circuits. This is especially true in reconfigurable low-bias circuits, for example, deep sub-micron low power switching circuits including programmable low-bias impedance circuits which may be used as a common network in analog circuits such as an ADC (Analog-to-Digital Converter) and DAC (Digital-to-Analog Converter), although not limited thereto.
The present inventors, in their investigative efforts of, for example, low-bias voltage analog circuits, have examined the phenomenon of leakage currents during the OFF-state of switching transistors, such as MOS (metal-oxide semiconductor) transistor switches or CMOS (complementary metal-oxide semiconductor) circuit switches and how they can affect the integrity of the operation of the circuits and thereby cause errors in the output. That is, when Vt is scaled down to very low levels, a degradation associated with the subthreshold characteristics develops. Such degraded subthreshold characteristics leads to an increase in the leakage current. In fact, such subthreshold leakage current, even at zero gate bias (Vgs=0), can result in appreciable signal leakage in, for example, analog circuits. In other words, this current leakage problem during the OFF-state of switching MOS/CMOS transistors, etc., puts, in effect, a limit for Vt scale-down, as well as a limit with regard to scaling down even further the low and high voltage levels associated with the switching operation of transistors and, correspondingly also, the low boundary of the supply voltage (signal levels) associated with the low-voltage circuits. (A MOSFET refers to a metal-oxide-semiconductor field-effect transistor, an IGFET, which is generically inclusive of a MOSFET, refers to an insulated-gate field-effect transistor, and a CMOS circuit refers to a pair of complementary MOSFETs, including, for example, where the p- and n-channel MOSFETs are in parallel connection like a CMOS transmission gate with the gates thereof receiving complementary signals such as through an inverter.) Occurrence of leakage current in the subthreshold region, for example, in which Vgs<Vt for a MOS transistor (e.g., a MOSFET or, generically, a MISFET [metal-insulator-semiconductor field-effect transistor]), significantly increases when the supply voltage (e.g., Vdd) and the threshold voltage Vt are scaled down even further and the ON current/OFF current ratio becomes degraded, also. A reduced Vt increases occurrence of leakage currents during the off-state of MISFETs. Moreover, the scaling down of the device size for the constant threshold also increases the leakage current. In consideration of achieving improved results in the design of low bias current (low power) circuits, the present inventors have considered the criteria of subthreshold conduction, also.
SUMMARY
A multi-stage assembly, has a plurality of stages which are successively arranged, beginning with the first stage and in which and ending with the final stage, each stage includes a controllable circuit portion and a controlling switching portion coupled thereto. In the multi-stage assembly, the controlling switching portions of all stages have one or more ON/OFF switches. A first end of each ON/OFF switch of each controlling switching portion of the assembly is coupled to a separate node of the controllable circuit portion of a corresponding stage and, also, being coupled, respectively, to a second end of a corresponding switch in an adjacent succeeding stage thereby to form selectively actuated one or more strings of series-coupled ON/OFF switches. All switches in an individual string are ON and OFF substantially simultaneously.


REFERENCES:
patent: 4158786 (1979-06-01), Hirasawa
patent: 4529890 (1985-07-01), Kobayashi et al.
patent: 5012123 (1991-04-01), Ayasli et al.
patent: 5623222 (1997-04-01), Tamagawa
Dieter K. Schroder, “Modular Series on Solid State Devices”,Advanced MOS Devices, Neudeck & Pierret, Editors (1987), pp. 208-212.

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