Ink jet head structure having MOS transistors for power...

Incremental printing of symbolic information – Ink jet – Ejector mechanism

Reexamination Certificate

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C257S336000

Reexamination Certificate

active

06267470

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an ink jet head used for an ink jet recording apparatus for recording on a recording medium by discharging ink, which is provided with heaters that generate energy utilized for discharging ink, and MOS transistors that supply electric power to the heaters. The invention also relates to a head substrate, an ink jet cartridge, and an ink jet apparatus.
2. Related Background Art
The ink jet head, which is mounted on an ink jet recording apparatus, is provided with a plurality of discharge ports to discharge ink, a common liquid chamber to provisionally retain ink to be supplied to each of the discharge ports, and ink paths that connect the common liquid chamber and each of the discharge ports. In each of the ink paths, a heater (electrothermal transducing element) is formed to generate energy utilized for discharging ink. The heaters are arranged on a substrate made of silicon or the like, and formed on the substrate with the MOS transistors that serves as driving elements to supply electric power to the heaters together with wiring and others. With a structure of the kind, the ink, which has been supplied to the common liquid chamber, is induced into each of the ink paths and held in it by the meniscus formed at each of the discharge ports when recording is executed. At this juncture, the heaters are selectively driven to create film boiling and generate air bubbles in the respective ink paths. With the development of such air bubbles, ink is discharged from the discharge ports, respectively.
FIG. 2
shows the example of such heater driving circuit.
FIG. 2
is a block diagram which illustrates the structure of a heater driving circuit for the conventional ink jet head.
In
FIG. 2
, one end of a heater
201
that generates energy for discharging ink is connected to a first power source line
205
that serves as the supply source of a given electric power for each of the heaters
201
. The other end of the heater
201
is connected to the drain (D) of a MOS transistor
202
that controls the electric power to be supplied to the heater. The source (S) of the MOS transistor is connected to the ground potential
210
, and a pressurizing circuit
211
is connected to a gate (G) to which voltages are applied to control the on and off of the MOS transistor. The pressurizing circuit
211
pressurizes and outputs the voltage that has been output from the latch circuit
203
, which will be described later, so as to apply a voltage that makes the on-resistance of the MOS transistor small enough. Also, to the pressurizing circuit
211
, an electric power is supplied from a second power source line
212
.
A shift register
204
is a circuit to provisionally hold image data for recording by supplying electric power to each of the heaters
201
. On the input terminal
207
for a transmission clock, the transmitting clock (CLK) is inputted. To the image data input terminal
206
, image data (DATA) are inputted in the form of serial data, and transferred to the shift register
204
.
The outputs of the shift register
204
are connected to the latch circuits corresponding to the heaters
201
, respectively. Each of the latch circuits
203
is to store and hold image data per corresponding heater
201
, and latches image data in accordance with the timing signal (LT) to be inputted from the latch signal input terminal
208
. Also, the pressurizing circuits
211
are connected to each output of the latch circuits
203
through switches
209
, respectively. The input and cut off of signals are controlled by the on and off of the respective switches
209
.
These image data (DATA), transmission clocks (CLK), and timing signals (LT) are transmitted from a control board (not shown) provided for an ink jet recording apparatus.
Now, with reference to
FIGS. 3
,
4
and
5
, the description will be made of the elemental structure of a MOS transistor
202
that controls the supply of electric power to a heater
201
.
FIG. 3
is a plan view which shows the layout structure of the MOS transistor represented in FIG.
2
.
FIG. 4
is a cross-sectional view of the MOS transistor, taken along line
4

4
in FIG.
3
. Also,
FIG. 5
is a structurally sectional view which shows a parasitic transistor unintentionally formed on the MOS transistor represented in FIG.
3
. In this respect,
FIG. 5
is a cross-sectional view which represents an example in which an N-channel MOS transistor is shown. In
FIG. 3
, the active area
301
is a semiconductor substrate where MOS transistors
202
are formed corresponding to each of the heaters
201
. On this area, the doping layers that become the source region (S)
303
and the drain region (D)
304
, respectively, are alternately formed with an electrode made of polysilicon or the like that becomes the gate (G)
302
being arranged between each of source and drain regions. As shown in
FIG. 3
, the MOS transistor
202
is structured by the unit segments comprising two gates
302
, two source regions
303
and one drain region
304
in order to enhance the current supply capability thereof with respect to the heater
201
. However, the source region
303
is shared by the adjacent unit segments for use, respectively.
Also, outside the active area
301
, each contact unit
305
is arranged to fix the potential of the back gate area.
As shown in
FIG. 4
, an oxide film
405
is formed to be an insulation layer on the surface of the active area
301
that serves as the semiconductor substrate for each of the MOS transistors
202
. On the oxide film
405
, each electrode is formed to be a gate
302
. The source region
303
and drain region
304
that form the respective doping layers are arranged near the surface of the active area with the oxide film
405
between them, and are externally and electrically connected by means of electrodes (not shown). Here, the area where the source region
303
and drain region
304
are not provided becomes the back gate area
401
.
In
FIG. 5
, on the back gate area
501
that serves as a p-type semiconductor substrate, an oxide film
506
is formed to be an insulation layer. On the oxide film
506
, each of the gates
502
is arranged by an electrode formed by polysilicon or the like. Near the surface of the back gate area
501
, there are arranged the source region
503
and drain region
504
formed by N
+
-type semiconductor, and the contact unit
505
formed by P
+
-type that serves as an lead-out electrode from the back gate area, with the oxide film being placed between them.
The drain region
504
is connected to a first power source line thorough a heater
511
. A power source voltage V
H
is applied to it. Also, both the source region
503
and the contact unit
505
are connected to the ground potential.
Now, on the back gate area
501
described above, a parasitic transistor
510
(lateral NPN bipolar transistor) is equivalently formed unintentionally, having the source region
503
as its emitter E; the back gate area
501
as its base B, and the drain region
504
as its collector C, respectively.
Each contact unit
505
is arranged to fix the potential of the back gate area
401
, and by applying a given voltage to the contact unit
505
, it becomes possible to stably fix the threshold voltage V
th
at a desired level to switch on the MOS transistor
202
. Here, in this respect, the contact unit
505
is connected to the ground potential.
For an ink jet head mounted on an ink jet recording apparatus, it is desirable to make a smaller semiconductor chip capable of giving a larger electric power to each of the heaters. To this end, the layout structure of the MOS transistor
202
is such that as shown in
FIG. 3
, the gate
302
, the source region
303
, and the drain region
304
are formed in a strip configuration on the active area
301
in order to enhance the current supply capability of each MOS transistor. Consequently, the conventional contact units
305
are arranged in locations outside the active area
301
.
When the MOS t

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