Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1998-06-16
2001-08-07
Guay, John (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S694000, C257S698000, C257S696000, C257S700000, C257S706000, C257S707000
Reexamination Certificate
active
06271583
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to semiconductor devices, and more particularly, to a semiconductor device having a plastic or resin encapsulated package structure.
Recently, the demands for further improved integration density and operation speed of semiconductor devices have increased. But as the integration density of the semiconductor device is increased, the number of leads increases. The effects of the lead inductance become a problem as the operation speed of the semiconductor device is increased. Accordingly, there are demands to realize a semiconductor device which can cope with both the increasing number of leads and the lead inductance.
FIG. 1
shows an example of a conventional semiconductor device. A semiconductor device
1
shown in
FIG. 1
is the so-called quad flat package (QFP) type, and a semiconductor chip
3
is mounted on a stage
2
which is positioned at a central part of the semiconductor device
1
. The semiconductor chip
3
and leads
4
are electrically connected by wires
5
which wire-bond inner leads
4
a
of the leads
4
to the semiconductor chip
3
. The semiconductor chip
3
and the inner leads
4
a
are resin-encapsulated by a resin package
6
. Furthermore, outer leads
4
b
of the leads
4
extend outside the resin package
6
and are bent in a gull-wing shape so as to facilitate surface mounting of the semiconductor device
1
.
The semiconductor chip
3
of the semiconductor device
1
having the construction described above has a high integration density and is used as an application specific integrated circuit (ASIC), for example. For this reason, the number of the leads
4
exceeds 300, for example. In addition, the switching speed of the semiconductor chip
3
is extremely high in order to realize a high-speed processing.
However, according to the semiconductor device
1
, only the leads
4
are provided to electrically connect the semiconductor chip
3
to an external circuit substrate. Hence, as the integration density of the semiconductor chip
3
increases and the number of electrodes to be connected increases, the number of leads
4
inevitably increases considerably.
On the other hand, there are also demands to reduce the size of the semiconductor device
1
in order to improve the mounting efficiency thereof. For this reason, it is not possible to simply increase the size of the resin package in order to meet these demands. Accordingly, in order to cope with the increasing number of the leads
4
, the size of each lead
4
itself must be reduced. However, if the size of each lead
4
is reduced, the inductance per lead
4
increases.
If the inductance of each lead
4
increases, the noise from the leads
4
becomes large, and even if the semiconductor chip
3
carries out a high-speed processing, the high-speed operation of the semiconductor device
1
as a whole is interfered with by the noise from the leads
4
.
Therefore, according to the conventional semiconductor device
1
, there is a problem in that it is impossible to realize both high-speed operation and high integration density.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful semiconductor device in which the problem described above is eliminated.
Another and more specific object of the present invention is to provide a semiconductor device comprising a substrate having a first surface, a second surface, and at part exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of connecting means electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that at least the conductor parts are exposed at the second surface of the substrate. According to the semiconductor device of the present invention, it is possible to electrically connect the semiconductor chip and an external circuit substrate not only via the leads but also via the conductor part. In addition, it is possible to reduce the inductance as compared to the case where the leads are used for the electrical connection, and therefore realize high-speed operation of the semiconductor device. Furthermore, since the leads and the conductor part are separated, it is possible to prevent the power supply noise from mixing into the signal leads.
Still another object of the present invention is to provide a semiconductor device adapted to be mounted on an external circuit substrate having a mounting surface and one or a plurality of conductor patterns formed on the mounting surface, comprising a substrate having a first surface, a second surface, and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of connecting means electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that at least the conductor parts are exposed at the second surface of the substrate. Each conductor part of the substrate may be located at a position such that the conductor parts make contact with corresponding ones of the conductor patterns of the external circuit substrate when the semiconductor device is mounted on the mounting surface of the external circuit substrate. Alternatively, each conductor part of the substrate may include a part which connects to a first end of an electric cord which has a second end connected to a corresponding one of the conductor patterns of the external circuit substrate.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
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IBM Technical Disclosure Bulletin; vol. 33, No. 2, Jul. 1990.
Sakoda Hideharu
Tsuji Kazuto
Yoneda Yoshiyuki
Chambliss Alonzo
Fujitsu Limited
Guay John
Staas & Halsey , LLP
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