Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural oscillators controlled
Reexamination Certificate
1999-12-13
2001-06-12
Grimm, Siegfried H. (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Plural oscillators controlled
C331S010000, C331S016000, C331S020000, C331S025000, C348S540000
Reexamination Certificate
active
06246292
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a phase lock loop circuit (hereinafter to be referred to as a PLL circuit) for generating a dot clock frequency according to a resolution in order to display characters or image information on a multi-scan monitoring screen corresponding to horizontal and vertical synchronizing signals.
BACKGROUND OF THE INVENTION
FIG. 8
is a block diagram that shows an example of a conventional PLL circuit shown in Japanese Patent Application Laid-open Publication No. HEI 9-153799. As shown in
FIG. 8
, this PLL circuit
1000
includes a phase comparator
1100
, a loop filter
1200
, a voltage controlled oscillation (VCO) circuit
1300
, a frequency-dividing circuit
1400
, and a frequency detecting circuit
1500
. A horizontal synchronizing signal fH and a reference signal fr from the frequency-dividing circuit
1400
are input into the phase comparator
1100
. The phase comparator
1100
then supplies detected signals to the loop filter
1200
. A control signal VL output from the loop filter
1200
is input into the VCO oscillation circuit
1300
. The VCO oscillation circuit
1300
then outputs a frequency signal nfH that is n times of the frequency of the horizontal synchronizing signal fH. Further, the horizontal synchronizing signal fH and a clock signal CL are input into the frequency detecting circuit
1500
. The frequency detecting circuit
1500
outputs a characteristics change-over signal MSn for changing over the oscillation characteristics of the VCO oscillation circuit
1300
.
FIG. 9
shows the operation of the VCO oscillation circuit
1300
. Based on the oscillation characteristics changed over by the VCO oscillation circuit, the VCO oscillation circuit
1300
carries out an oscillation operation in a predetermined frequency according to the control signal VL output from the loop filter
1200
.
Accordingly, for obtaining oscillation characteristics over a wide range, the VCO oscillation circuit
1300
is operated in a frequency area as shown by a broken line in FIG.
9
. Thus, a wider dynamic range is realized.
According to the above-described conventional PLL circuit, however, when there is an increase in the oscillation characteristics, it is necessary to expand the operation frequency area of the VCO oscillation circuit along with this increase. Thus, the operation becomes unstable, and it becomes difficult to automatically select necessary oscillation characteristics.
SUMMARY OF THE INVENTION
In the PLL circuit according to a first aspect of the present invention, a DC level decision unit decides the DC level of a vertical synchronizing signal during a return period, and a logic circuit automatically selects an oscillation circuit according to the DC level decided in the DC level decision unit. Therefore, it is possible to automatically select the oscillation circuit having necessary oscillation characteristics.
In the PLL circuit according to a second aspect of the present invention, a DC level decision unit decides the DC level of a signal obtained during a period when a display of display information on a monitoring screen is off, and a logic circuit automatically selects an oscillation circuit according to the DC level decided in the DC level decision unit. Therefore, it is possible to automatically select the oscillation circuit having necessary oscillation characteristics.
In the PLL circuit according to a third aspect of the present invention, a frequency-dividing circuit divides the frequency of a clock, a phase comparator compares the phase of a clock frequency-divided by the frequency-dividing circuit with the phase of a horizontal synchronizing signal, a charge pump circuit charges up or discharges, by receiving an error signal output from the phase comparator, a loop filter receives the output data from the charge pump circuit, a DC level decision circuit decides the DC level of the signal output from the loop filter, a logic circuit receives the output data from the DC level decision circuit, and finally an oscillation circuit outputs oscillation characteristics according to the output signal from the logic circuit and the loop filter. Therefore, it is possible to automatically select the oscillation circuit having necessary oscillation characteristics.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 4958228 (1990-09-01), Kutsuki
patent: 5184091 (1993-02-01), Srivastava
patent: 5777520 (1998-07-01), Kawakami
patent: 7303041 (1995-11-01), None
patent: 9153799 (1997-06-01), None
patent: 9162730 (1997-06-01), None
Grimm Siegfried H.
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
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