Amplifiers – With periodic switching input-output
Reexamination Certificate
1998-11-25
2001-05-01
Shingleton, Michael B (Department: 2817)
Amplifiers
With periodic switching input-output
C327S307000, C330S252000, C330S257000, C360S067000
Reexamination Certificate
active
06225863
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an offset adjusting apparatus for canceling an offset voltage generated in a difference amplifier.
2. Description of the Prior Art
FIG. 5
is a circuit diagram showing an operational amplifier to which a conventional offset adjusting apparatus is applied. In the figure, reference numeral
1
denotes a differential head section including a difference amplifier of the operational amplifier. Numeral
2
denotes a current mirror section including another difference amplifier of the operational amplifier. Numeral
3
denotes an output stage circuit of the operational amplifier. Numeral
4
denotes a capacitor for phase compensation.
Reference character Tr
1
denotes a transistor for supplying a constant current. Characters Tr
2
and Tr
3
denote transistors of the differential head section
1
. Characters Tr
4
and Tr
5
denote transistors of the current mirror section
2
. Characters Tr
6
and Tr
7
denote transistors of composing the output stage circuit
3
.
FIG. 6
is a circuit diagram showing a conventional offset adjusting apparatus shown in, for example, JP-Sho. 59-67705. In the figure, reference numeral
5
denotes a transistor group for adjusting an offset voltage, including transistors A
1
-An connected in parallel to each other. Numeral
6
denotes a selection switch for controlling the turning on and off of the transistors A
1
-An.
Next, the operation of the prior art will be described.
If specific characteristics, such as a threshold voltage and variations in designed size, of the transistors Tr
2
and Tr
3
, of the differential head section
1
, completely accord with each other, and if specific characteristics of the transistors Tr
4
and Tr
5
, of the current mirror section
2
, completely accord with each other, an offset voltage generated in the operational amplifier is 0 mV under a condition that the resistance of wiring is distributed unsymmetrically in its layout.
However, it is actually almost impossible to produce those transistors so that the above-mentioned specific characteristics of the transistors are completely equal to each other and that the resistance of wiring is distributed completely unsymmetrically in a production process of a semiconductor integrated circuit using a wafer process. As a result, an offset voltage is usually generated.
Accordingly, when an offset voltage generated in an operational amplifier is required to be cancelled, conventionally, transistor groups
5
are connected in parallel to the transistors Tr
4
and Tr
5
in the current mirror section
2
, respectively, and further the on-resistance of the transistor Tr
4
or Tr
5
is adjusted by switching the on-off states of transistors A
1
-An of the transistor groups
5
with the selection switch
6
for canceling the generated offset voltage.
That is, when the on-off states of the transistors A
1
-An are switched, the on-resistance of the transistor Tr
4
or Tr
5
is changed to vary the gate voltage of the transistor Tr
7
. As the on-resistance of the transistor Tr
7
is varied consequently, the output voltage of the output stage circuit
3
can be adjusted.
Therefore, the offset voltage can be canceled by switching the on-off states of the transistors A
1
-An.
Because the conventional offset adjusting apparatus is constructed as above, the accuracy of cancellation of an offset voltage can be improved in the transistor groups
5
by connecting a lot of transistors having an appropriate size in parallel to each other. However, there is a problem that the layout size of the transistor groups
5
is large due to their large circuit scale in such cases where the gates of the transistors Tr
4
and Tr
5
are designed to be wide because their threshold voltages are low and where the transconductances of the transistors Tr
4
and Tr
5
are relatively small.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to obtain an offset adjusting apparatus that can improve the accuracy of cancellation of an offset voltage even if it is not appropriate to connect transistor groups including many transistors connected in parallel to each other, respectively, with a pair of transistors of a current mirror section, and that can increase the degree of freedom of designing the transistor groups so as to enable a circuit designer to design a circuit optimum in layout.
For attaining the above-mentioned object, according to a first aspect of the present invention, there is provided an offset adjusting apparatus comprising a plurality of transistor groups, which are composed of a plurality of transistors connected in parallel to each other, respectively, the plurality of transistor groups being connected in parallel to either a pair of transistors distributed on the left side of a differential head section and a current mirror section, or a pair of transistors distributed on their right side, wherein the offset adjusting apparatus controls the turning on and off of the transistors composing the plurality of transistor groups. Consequently, there can be obtained an advantage that the accuracy of cancellation of an offset voltage can be improved even if it is not appropriate to connect the plurality of transistor groups to the pair of transistors in the current mirror section from a viewpoint of, for example, the designing of circuit elements optimum in size, and an advantage that the degree of freedom of designing the plurality of transistor groups can be increased.
According to a second aspect of the invention, there is provided an offset adjusting apparatus comprising a plurality of transistor groups, which are composed of a plurality of transistors connected in parallel to each other, respectively, the plurality of transistor groups being connected in parallel to either a pair of transistors, one of which is distributed on the left side of a differential head section and the other of which is distributed on the right side of a current mirror section, or a pair of transistors distributed vice versa, wherein the offset adjusting apparatus controls the turning on and off of the transistors composing the plurality of transistor groups. Consequently, there can be obtained an advantage that the accuracy of cancellation of an offset voltage can be improved even if it is not appropriate to connect the plurality of transistor groups to the pair of transistors in the current mirror section from a viewpoint of, for example, the designing of circuit elements optimum in size, and an advantage that the degree of freedom of designing the plurality of transistor groups can be increased.
According to a third aspect of the invention, there is provided an offset adjusting apparatus comprising a plurality of transistor groups, which are composed of a plurality of transistors connected in parallel to each other, respectively, the plurality of transistor groups being connected in parallel to any one of transistors composing a differential head section or a current mirror section, wherein the offset adjusting apparatus controls the turning on and off of the transistors constituting the plurality of transistor groups. Consequently, there can be obtained an advantage that the accuracy of cancellation of an offset voltage can be improved even if it is not appropriate to connect the plurality of transistor groups to the pair of transistors in the current mirror section from a viewpoint of, for example, the designing of circuit elements optimum in size, and an advantage that the degree of freedom of designing the plurality of transistor groups can be increased.
According to a fourth aspect of the invention, there is provided an offset adjusting apparatus comprising a control circuit controlling the turning on and off of the transistors composing a plurality of transistor groups on the basis of data indicating an offset cancellation quantity. Consequently, there can be obtained an advantage that an offset voltage can be adjusted only by giving the data indicating an offset cancellation quantity to the control circuit.
According to
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Shingleton Michael B
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