Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1998-01-12
2001-05-15
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C307S110000, C363S060000
Reexamination Certificate
active
06232826
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of integrated circuits; more particularly, the present invention relates to a charge pump.
2. Description of Related Art
Power consumption in integrated circuits is generally reduced as the power supply voltage is reduced. Reducing power consumption is particularly important for portable devices since they generally are powered by batteries.
However, some circuitry in an integrated circuit may require a higher power supply voltage than the rest of the integrated circuit. For example, flash memories typically require a higher voltage to perform program operations to memory cells. A charge pump is generally used to receive a low voltage power supply and generate a higher voltage power supply for the high voltage circuitry.
A Dickson charge pump is a well-known charge pump configuration that employs n-type transistors coupled in series. The input of the series is the low voltage power supply and the output of the series is the high voltage power supply. The voltage gain of each stage of the series (efficiency) is related to the increase in the gate voltage (due to the charge pumped into the gate node) less the V
T
voltage drop to the output (source) node of that stage.
As the low voltage power supply is reduced, the efficiency of the Dickson charge pump is severely degraded. As the voltage of the low voltage power supply is reduced, the voltage fluctuation at the pumping nodes is reduced thereby reducing the amount of charge pumped into the gate node for given pumping capacitors. This reduces the increase in gate voltage for each stage. In addition, the V
T
voltage drop becomes more significant relative to the reduced increase in gate voltage for low voltage power supply voltages that approach the V
T
voltage drop. Thus, more of the increase in gate voltage is lost to the V
T
voltage drop to the output node as the voltage of the low voltage power supply is reduced.
The body effect causes the V
T
of an n-type transistor to increase as the source to substrate voltage increases. Since the substrate voltage is typically coupled to ground for an n-type transistor and the source voltage of each subsequent stage of the series is increasing (being pumped higher than the previous stage), the V
T
of each stage of the charge pump is higher than the previous stage. Thus, each additional stage of the Dickson charge pump increments the output voltage by less than the previous stage due to the body effect. Eventually, the increase in the output voltage for an additional stage is so small or non-existent that it is impractical or ineffective to add additional stages. Thus, the efficiency and scalability of the Dickson charge pump is limited.
Circuitry that tends to compensate for the body effect has been developed. However, this circuitry employs many additional transistors thereby increasing the cost of the implementation.
Therefore it is desirable to have a charge pump for a low voltage power supply that is more efficient than the Dickson charge pump. Furthermore, it is desirable to provide a charge pump for a low voltage power supply that can be scaled more effectively than the Dickson charge pump.
SUMMARY OF THE INVENTION
An apparatus has a first input and a first output, a circuit including a first capacitor having a first node and a second node coupled to receive a first signal; a first p-type transistor having a first gate, a first source, and a first drain, the first gate being coupled to the first node and the first drain, the first source being coupled to the first input; a second capacitor having a third node and a fourth node coupled to receive a second signal; and a second p-type transistor having a second gate, a second source, and a second drain, the second gate being coupled to the third node and the second drain, the second source being coupled to the first drain, the second drain being coupled to the first output.
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Afghahi Morteza C.
He Yueming
Blakely , Sokoloff, Taylor & Zafman LLP
Callahan Timothy P.
Englund Terry L.
Intel Corporation
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