Sheet-material associating – Associating or disassociating – Signature associating
Reexamination Certificate
1998-12-14
2001-01-09
Bowers, Charles (Department: 2823)
Sheet-material associating
Associating or disassociating
Signature associating
C438S286000, C438S206000
Reexamination Certificate
active
06170815
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor and a fabrication method thereof, and in particular to an improved method for fabricating a thin film transistor including forming a gate electrode and impurity regions by a self aligning process and a thin film transistor resulting therefrom.
2. Description of the Background Art
A conventional thin film transistor fabrication method is shown in FIGS.
1
A-
1
D of the accompanying drawings.
In
FIG. 1A
, a gate electrode
2
is formed on an insulation substrate
1
. The gate electrode
2
results from forming an impurity-doped polysilicon film on the substrate
1
by applying a chemical vapor deposition method and a photoetching method using a gate mask.
As shown in
FIG. 1B
, a gate insulation film
3
is formed by depositing an insulation member on a front surface of the insulation substrate
1
including the gate electrode
2
, and an active layer
4
is formed on the gate insulation film
3
using the chemical vapor deposition method.
As shown in
FIGS. 1C and 1D
, a photoresist member is coated on the active layer
4
, and the resultant structure is subsequently patterned using the photo-etching method, thus forming a photoresist film pattern
5
. Then, a p-type impurity (B, BF
3
, etc.) or an n-type impurity (As, P, etc.) is implanted into the exposed portion of the semiconductor film (active layer
4
) using the photoresist film pattern
5
as a mask, thus defining impurity regions
6
a
and
6
b
, so that the thin film transistor is fabricated. The photoresist film pattern
5
defines a channel region “b” of the active layer
4
corresponding to the gate electrode
2
and an offset region “c” between the impurity regions
6
a
and
6
b
. The impurity regions denote a source “a” and a drain “d”, respectively.
In the above-described conventional thin film and a fabrication method thereof, the off current is largely varied depending on the degree of the alignment which defines the lengths of the channel region and offset region, so that the reliability and productivity of the device are decreased.
SUMMARY OF THE INVENTION
The present invention is directed to system that substantially obviates one or more of the problems experienced due to the above and other limitations and disadvantages of the related art.
Accordingly, it is an object of the present invention to provide a thin film transistor and a fabrication method thereof which overcome the aforementioned problems encountered in the background art.
It is another object of the present invention to provide a thin film transistor and a fabrication method thereof which are capable of stabilizing an off current which depends on the self-alignment method.
It is still another object of the present invention to provide a thin film transistor and a fabrication method thereof which is capable of fabricating a desired device characteristic by adjusting the lengths of a channel region and an offset region.
Other and further objects, features and advantages of the present invention will be set forth in the description that follows, and in part will become apparent from the detailed description, or may be learned by practice of the invention.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the present invention includes a thin film transistor which includes a substrate having a trench, a gate electrode formed on one side in the interior of the trench, a gate insulation film formed on the substrate including the gate electrode, an active layer formed on the gate insulation film, and impurity regions formed in the active layer corresponding to both sides of the trench.
To achieve the above objects, there is provided a method for fabrication a thin film transistor which includes the steps of forming a trench in a substrate, forming a gate electrode on one side in the interior of the trench, forming a gate insulation film on the substrate including the gate electrode, forming an active layer on the gate insulation film, forming an insulation film on the active layer corresponding to the trench, and forming impurity regions on the active layer using the insulation film as a mask.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. Thus, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of example only. Various changes and modifications that are within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. In fact, other objects, features and characteristics of the present invention; methods, operation, and functions of the related elements of the structure; combinations of parts; and economies of manufacture will surely become apparent from the following detailed description of the preferred embodiments and accompanying drawings, all of which form a part of this specification, wherein like reference numerals designate corresponding parts in various figures.
REFERENCES:
patent: 5578838 (1996-11-01), Cho et al.
patent: 5659183 (1997-08-01), Manning et al.
patent: 5869361 (1999-02-01), Cho
patent: 5933717 (1999-08-01), Hause et al.
Bowers Charles
Brewster William M.
Hyundai Electronics Industries Co,. Ltd.
LandOfFree
Method of fabricating a thin film transistor including... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a thin film transistor including..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a thin film transistor including... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2450620