Synchronization equipment

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

Reexamination Certificate

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Details

C375S368000, C375S213000, C370S514000

Reexamination Certificate

active

06289064

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a synchronization equipment used in digital communication.
2. Description of the Related Art
Conventionally, in this sort of synchronization equipment, a correlation value of a known pattern formed from a known symbol included in a received signal with a known pattern belonging to a receiver is computed, and it is decided that the known pattern has been detected when the computed correlation value becomes larger than a predetermined threshold value (disclosed in JP-A-7-250120 for instance).
This sort of synchronization equipment includes, as shown in
FIG. 1
, first and second analog-to-digital converters
101
and
102
to which in-phase components I-ch and orthogonal components Q-ch of a received signal obtained by synchronous detection of the received signal are inputted, respectively, a correlation circuit
103
to which the output signals of the first and second A/D converters
101
and
102
are inputted, and a reception timing detection circuit
108
to which the output signal of the correlation circuit
103
is inputted. Here, the correlation circuit
103
includes a first memory
104
for storing the in-phase components I-ch and the orthogonal components Q-ch of M pieces of received signals having known patterns inputted from the first and second A/D converters
101
and
102
, a correlator
105
to which two output signals of the first memory
104
are inputted, a second memory
106
where in-phase components and orthogonal components of known patterns belonging to the receiver are stored, and a power detection circuit
107
to which two output signals of the correlator
105
are inputted. Further, the reception timing detection circuit
108
includes a memory
110
where a predetermined threshold value is stored, and a comparator
109
for comparing the output signal of the correlation circuit
103
and the threshold value stored in the memory
110
with each other.
In this synchronization equipment, the in-phase components I-ch and the orthogonal components Q-ch of the received signal obtained by the synchronous detection of the received signal are quantized by the first and second A/D converters
101
and
102
, and stored thereafter in the first memory
104
of the correlator circuit
103
. In the first memory
104
, the in-phase components I-ch and the orthogonal components Q-ch of M pieces of received signals having the known pattern can be stored by the fact that the in-phase components I-ch and the orthogonal components Q-ch of the received signal stored most previously are superscribed by the in-phase components I-ch and the orthogonal components Q-ch of a newly inputted received signal.
In the correlator
105
of the correlation circuit
103
, two correlation values comb
I
and comb
Q
are computed with the following expressions using the in-phase components I-ch and orthogonal components Q-ch of the received signal outputted from the first memory
104
and the in-phase components and orthogonal components of the known pattern outputted from the second memory
106
.
comb
I
=
Re

[

i
=
1
M

sw

(
i
)
×
r

(
i
)
*
]
=

i
=
1
M

{
sw
I

(
i
)
×
r
I

(
i
)
+
sw
Q

(
i
)
×
r
I

(
i
)
}
(
1
)
comb
Q
=
Im

[

i
=
1
M

sw

(
i
)
×
r

(
i
)
*
]
=

i
=
1
M

{
-
sw
Q

(
i
)
×
r
Q

(
i
)
+
sw
I

(
i
)
×
r
Q

(
i
)
}
(
2
)
Two correlation values comb
I
and comb
Q
computed in the correlator
105
are converted into one correlation value (power) comb by being processed in accordance with the following expression in the power, detection circuit
107
.
comb=comb
I
2
+comb
Q
2
  (3)
Besides, in the above-described expressions (1) to (3), inferior letters I and Q show in-phase components and orthogonal components, respectively. Further, respective processings shown in the above-described expressions (1) to (3) can be realized simply by means of a software of a signal processor such as DSP.
The correlation value obtained in the correlation circuit
103
is compared with the threshold value which has been stored in the third memory
110
in the comparator
109
of the reception timing detection circuit
108
. When the correlation value obtained by the correlation circuit
103
is larger than this threshold value, it is decided that the known symbol has been received.
Besides, the correlation value is normalized with the power of the received signal sometimes in order to oppress power variation of the correlation value by fading, but a structure in the case such normalization is not made is shown here.
In a synchronization equipment such as described above, however, there are such problems as shown hereunder.
(1) Generally, when transmission is made including a known symbol train in a transmission signal, the correlation value shows the largest at the time when a transmitter transmits the known symbol train in an ideal state when the correlation between this known symbol train and the known symbol train belonging to a receiver is obtained. However, even when optimum timing is going to be detected from a fact that the correlation value simply becomes larger than a certain value or from a peak of the correlation value, the synchronization equipment does not necessarily operate smoothly when the received wave (hereinafter referred to as a “delay wave”) which is received after reflected by a building or a mountain is in existence.
Namely, the correlation values when such a delay wave exists are shown in
FIGS. 2A
to
2
D for instance. When only a desired received wave (hereinafter referred to as a “lead wave” or a “desired wave”) exists, it is possible to obtain timing which coincides with the lead wave accurately as shown in FIG.
2
A. Further, when only a delay wave exists, it is possible to obtain timing which coincides with the delay wave accurately as shown in FIG.
2
B. However, when the lead wave and the delay wave are in opposite phases and added to each other, the correlation value becomes small. Therefore, as shown in
FIG. 2C
, when the threshold value is made slightly larger, both the timing of the lead wave and the timing of the delay wave become no longer be detected. On the other hand, when the lead wave and the delay wave are in-phase and added to each other, the peak of the correlation value is detected at both of the reception time of the lead wave and the reception the of the delay wave. Therefore, as shown in
FIG. 2D
, the timing of the delay wave is detected only by the comparison with the threshold value.
(2) The detection accuracy of the reception timing is not so high. Namely, the detection accuracy of the reception timing depends on a sampling speed of the A/D converter, and it is when the lag between a transmitter and a receiver reaches T/2 (T: sampling time interval) that the detection accuracy is detected as a timing lag. When the sampling time interval is large, the timing lag becomes large, and the reception Performance is deteriorated. Further, when the frequency discrepancy between the transmitter and the receiver is small even in case the sampling time interval is not so large, it takes time until the timing lag is detected and a state that the reception performance has been deteriorated to some extent continues for a long time duration.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a synchronization equipment which is capable of detecting reception time of a lead wave even when the lead wave and a delay wave exist at the same time in view of the problems described in the above item (1).
It is another object of the present invention to provide a synchronization equipment which is capable of detecting reception timing with high accuracy in view of the problems described in the above item (2).
A first synchronization equipment of the present invention is a synchronization equipment for performing correlation processing between a first known pattern included in a received signal and

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