Method of fabricating shallow trench isolation structure

Details Method of fabricating shallow trench isolation structure Method of fabricating shallow trench isolation structure

1999-04-05

2001-04-17

Kunemund, Robert (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C700S222000

Reexamination Certificate

active

06218307

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88104324, filed Mar. 19, 1999, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of fabricating an isolation region.
2. Description of the Related Art
In a conventional fabrication method of forming the shallow trench isolation (STI) structure, a pad silicon nitride layer is formed on active regions to protect the substrate during a chemical-mechanical polishing step. Typically, in order to prevent stress problems, the pad silicon nitride layer cannot be too thick. The preferred thickness of the pad silicon nitride layer is usually about 100 angstroms to 200 angstroms, or about 1500 angstroms. However, because of this certain thin pad silicon nitride layer, it is easy to form scratches in the active regions while the chemical-mechanical polishing is performed. The depth of the typical scratch even can reach 1000 angstroms. The scratches and other possible defects, which usually form on a corner of a STI structure, may reduce the performance of devices.
SUMMARY OF THE INVENTION
The invention provides a method of fabricating a shallow trench isolation structure. A pad oxide layer and a pad silicon nitride layer are formed over a substrate. The pad oxide layer, the pad silicon nitride layer, and the substrate are patterned to form a trench in the substrate. A high-density plasma (HDP) oxide layer is formed by HDP deposition to fill the trench. A minimum thickness of the HDP oxide layer is the same as the depth of the trench plus the thickness of the pad oxide layer. A maximum thickness of the HDP oxide layer is the same as the depth of the trench plus the thickness of the pad oxide layer and the thickness of the pad silicon nitride layer. A silicon nitride layer is formed over the substrate. The silicon nitride layer and the oxide layer together form a protruding portion. A chemical-mechanical polishing is performed in a range of from at least removing the protruding portion to exposing the silicon nitride layer. The HDP oxide layer is etched until the HDP oxide layer on the pad silicon nitride layer is removed. The pad silicon nitride layer and the silicon nitride layer are removed by etching.
The chemical-mechanical polishing step is performed in a range of from at least removing the protruding portion to exposing the silicon nitride layer. Because the chemical-mechanical polishing is not performed on regions near the substrate, the present invention prevents the active region, which is next to the STI structure, and the STI structure, from being scratched. The reliability of devices thus is enhanced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5728621 (1998-03-01), Zheng et al.
patent: 5976949 (1999-11-01), Chen
patent: 6057210 (2000-05-01), Yang et al.

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