Non-volatile semiconductor memory device and a method of using t

Details Non-volatile semiconductor memory device and a method of using t Non-volatile semiconductor memory device and a method of using t

1994-04-25

1996-02-13

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518518, 36518527, 36518512, G11C 1134

Patent

active

054916569

ABSTRACT:
An electrically alterable non-volatile semiconductor memory. The memory cells are formed in a matrix of columns and rows. A row decoder and column decoder are provided to select one of the row lines and column lines. Mode selection means are provided for selecting a writing mode, a first erasing mode for erasing a row of memory cells, a second erasing mode for erasing a selected memory cell on a bit basis, and a reading mode for reading the contents of each memory cell. The individual erasing modes reduce the overall power consumption of the device, while permitting block erasing as well as individual cell erasing.

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