Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-07-06
2001-05-22
Shalwala, Bipin (Department: 2623)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S063000, C345S068000, C345S090000, C345S182000, C345S204000, C348S797000, C315S169400
Reexamination Certificate
active
06236380
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for displaying gradation with a plasma display panel (hereinafter referred to as“PDP”).
2. Description of the Related Art
One such method is disclosed, for example, in the paper of the image engineering study group of The Institute of Electronics, Information and Communication Engineers, IT 72-45 (1973). In this paper, the gradation display is performed by time-dividing a field of an image into a plurality of subfields, and giving a proper weight on a luminescent period in each subfield. Thus, a linear gradation characteristic is obtained by altering a luminescent period to display a halftone in a PDP, which utilizes a discharge luminescence and in which a current or a voltage is not proportional to a luminescence.
FIG. 7 shows an example of a conventional method for displaying gradation with a PDP disclosed in JP-A-4-195188. In this method, a subfield is further divided into an addressing period and a sustaining period. In the addressing period, a binary data, i.e., on or off is written into every pixel by noninterlace scanning in which all scanning electrodes are selected sequentially. In the sustaining period following the addressing period, all pixels that have been given the on data are held emitting light for a predetermined period to display an image in a binary gradation.
Furthermore, the weight given to the sustaining period of each subfield, i.e., a ratio of the sustaining periods may be set 1, 2, 4, 8 . . . , 2
n−1
(n is a number of subfields) and all images in the subfields included in a field may be accumulated in eyes of a viewer. Thus, an image can be displayed in 64 gradation steps when n =6, or in 256 gradation steps when n =8.
FIG. 8
shows another example of a conventional method for displaying gradation disclosed in Japan Television Institute Memoir Vol. 38, No. 9 (1984). In this method, one field is divided into a plurality of subfields in the same way as the above-mentioned method shown in FIG.
7
. However, the method shown in
FIG. 8
starts the sustaining period immediately after selecting one of the scanning electrodes to write data into it. This operation is different from the method shown in FIG.
7
. The next scanning electrode to be selected is given data by utilizing a stop period for the light emitting pulse. The sustaining period of each subfield is given weight 2
m−1
(m =1, 2 . . . , n) for example in the same way as the example shown in FIG.
7
.
By such a method for displaying gradation, a PDP can display an image with a sufficient number of gradation levels, and it has attracted attention as realizing a so-called wall-hung TV or a flat TV in recent years.
However, the above mentioned method has the following disadvantage. The majority of the time is used for the addressing period for writing data and the sustaining period is too short to obtain a sufficient brightness of the PDP. The current mainstream is a surface discharge AC type PDP, which needs a period of approximately 2.5 microseconds for selecting a scanning electrode and writing data. In this case, if a PDP having 500 scanning electrodes is driven with 8-subfield division, the addressing period is 10 milliseconds (2.5 microseconds ×500 ×8). Therefore, only 6.7 milliseconds remain for the sustaining period in one field (16.7 milliseconds). As a result, the brightness of a PDP may be insufficient in the method of the prior art.
SUMMARY OF THE INVENTION
In order to solve the above mentioned problem of the prior art, the present invention provides a method for displaying gradation with a PDP, which comprises the steps of forming a field to include a whole scanning subfield and a partial scanning subfield, each of which includes an addressing period to scan scanning electrodes sequentially for writing image data and a sustaining period to hold the written image data, scanning all of the scanning electrodes one by one in the addressing period of the whole scanning subfield, and scanning some of the scanning electrodes in the addressing period of the partial scanning subfield.
Another displaying method of the present invention comprises steps of forming a field to include a whole scanning subfield and a quasi-whole scanning subfield, each of which includes an addressing period to scan scanning electrodes sequentially for writing image data and a sustaining period to hold the written image data, scanning all of the scanning electrodes one by one in the addressing period of the whole scanning period, and scanning all of the electrodes in a short time by selecting two neighboring scanning electrodes simultaneously in the addressing period of the quasi-whole scanning subfield.
According to each of the methods mentioned above, the addressing period can be shortened to expand the sustaining period by using an interlace scanning, and the flicker due to the interlace scanning can be suppressed.
It is preferable that the odd or even numbered scanning electrodes are scanned in the partial scanning subfield, supposing that each of the scanning electrodes has a number corresponding to the order of the arrangement. Similarly in the second method, data corresponding to the scanning electrode with either an odd number or an even number are written in the quasi-whole scanning subfield again supposing that the scanning electrodes are sequentially arranged
It is also preferable that the partial scanning subfield in which the odd numbered scanning are scanned and the partial scanning subfield in which the even numbered scanning electrodes are scanned appear alternately. Similarly it is preferable in the second method, that the quasi-whole scanning subfield in which the data corresponding to the odd numbered scanning electrode are written and the quasi-whole scanning subfield in which the data corresponding to the even numbered scanning electrode are written appear alternately.
REFERENCES:
patent: 5049865 (1991-09-01), Nakamura et al.
patent: 5436634 (1995-07-01), Kanazawa
patent: 5475448 (1995-12-01), Saegusa
patent: 5508716 (1996-04-01), Prince et al.
patent: 5541618 (1996-07-01), Shinoda
patent: 5724054 (1998-03-01), Shinoda
patent: 5734365 (1998-03-01), Ohno et al.
patent: 5818419 (1998-10-01), Tajima et al.
patent: 5874932 (1999-02-01), Nagaoka et al.
patent: 0 488 326 (1992-06-01), None
patent: 0 488 891 (1992-06-01), None
patent: 0 755 043 (1997-01-01), None
1984, Hiroshi Murakami et al., “A Color TV Display Using 8-Inch Pulse Discharge Panel with Internal Memory”Japan Television Institute Memoirvol. 38, No. 9, pp. 836-842 (with English translation).
1973, Tetsunori Kaji et al., “A Proposal of the Drive Method for TV using AC type Plasma Display Panel”Institute of Electronics and Communication EngineersIT 72-45 (with English translation).
Kosugi Naoki
Wakitani Takao
Wani Koichi
Kovalick Vincent E.
Matsushita Electric - Industrial Co., Ltd.
Merchant & Gould P.C
Shalwala Bipin
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