Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-06-30
2001-03-20
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000
Reexamination Certificate
active
06204455
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to components and methods for making connections in microelectronic devices.
BACKGROUND OF THE INVENTION
Microelectronic devices such as semiconductor chips require large numbers of electrical connections in a small area. For example, a complex semiconductor chip may have hundreds of contacts for signal input and output and for power supply, all within an area of a few cm
2
. These contacts must be reliably connected to corresponding contact pads on a substrate such as a chip mount, circuit panel or multichip module. The connection between the chip and the substrate must meet numerous, often contradictory requirements and desires. It should be low in cost, and yet highly reliable. It should require only the minimum amount of area on the substrate. Ideally, the connected chip should be accommodated in an area of the substrate approximately equal to that of the chip itself. The connections should be robust and capable of withstanding repeated changes in the temperature of the chip and the substrate, and the associated differential thermal expansion and contraction of the chip and substrate. Moreover, the connection systems should not impose unusual or costly requirements in fabrication of the chip or substrate. The connection system desirably should facilitate testing of the chip, and the connection system itself, before the chip is finally assembled to the substrate. All of these considerations, taken together, represent a formidable engineering challenge. These considerations are present, to a greater or lesser degree, in other connections used in microelectronic devices as, for example, connections between substrates or circuit panels.
Numerous solutions to these problems have been proposed heretofore. One common method of making connections to a semiconductor chip or a similar device is wire bonding. In wire bonding, numerous fine wires are connected to the contact pads of the chip and extend outwardly, over the edges of the chip, to corresponding contact pads on a substrate. The process requires individual connections of each contact on the chip and also requires an area of the substrate substantially larger than the chip itself. In a further method referred to as tape automated bonding or “TAB”, fine metallic leads are disposed on a polymeric tape. The leads may be connected individually or en masse to the contact pads of the chip and to the contact pads of the substrate. This method also requires a substantial area of the chip substrate surface. In so-called “flip-chip” bonding, the front or contact-bearing surface of the chip faces downwardly to the substrate, and each contact on the chip is connected to the corresponding contact pad on the substrate by a solder column. This method can mount a chip in an area of the substrate substantially equal to the area of the chip itself, but suffers from drawbacks such as poor resistance to thermal cycling, cost and process difficulties.
Numerous other chip mounting methods have been proposed. For example, Patraw, U.S. Pat. Nos. 4,695,870 and 4,716,049 disclose a package for a microelectronic chip utilizing hollow metallic “compressive pedestals” engaged between the chip and the substrate and making a spring-loaded electrical connection. McMahon, U.S. Pat. No. 5,321,583, discloses a second level interconnect, i.e., an interconnect arranged to connect an already packaged device to a circuit panel. This interconnect uses apparently solid metallic spheres disposed between the package and the circuit panel and an external spring to maintain engagement of all of the components. Tsukagoshi et al., U.S. Pat. No. 5,120,665, discloses an isotropic electrically conductive adhesive with numerous deformable electroconductive particles disposed therein. The particles may include a polymeric core with a thin metallic layer, typically less than about 1 micron thick. These particles are distributed at random between a chip and a substrate, so that those particles which are engaged between contacts of the chip and contact pads on the substrate will permit electrical conduction between the so-engaged pad and contact. As noted in International Interconnection Intelligence Flip Chip Technology Impact Report, pp. 3-79 to 3-80, a Seiko Epson Corporation process uses gold plated resin balls mixed with adhesive and printed onto a substrate contact. The substrate is then engaged with a chip and secured by a separate adhesive. Despite these efforts in the art, still further improvement would be desirable.
SUMMARY OF THE INVENTION
One aspect of the present invention provides methods of making microelectronic element assemblies. Methods according to this aspect of the present invention desirably include the steps of providing a plurality of deformable, electrically conductive elements, each such element including a thin, flexible metallic shell extending over at least a portion of the surface of the conductive element, and connecting the conductive elements to contacts on the microelectronic element so that the metallic shells are exposed, and then connecting the microelectronic element to a substrate by bonding the shells of the conductive elements to contact pads on the substrate. Because the shells are flexible, they can deform as the test probes engage the shells. The shells therefore can compensate for deviations from perfect planarity of the microelectronic element, of the shells themselves, or of the substrate. This helps to assure reliable engagement between the contact pads on the substrate and the shells. The method according to this aspect of the invention may also include the step of testing the microelectronic element prior to substrate bonding by forcibly engaging the substitute contact pads, or pads of a test probe, with the exposed shells and applying signals to the microelectronic element through the engaged robes and shells.
Each shell may be in the form of a hollow spheroid such as a hollow sphere. Each conductive element may incorporate a mass of a flexible, compressible polymeric material such as an elastomer inside the spheroidal shell. The polymeric material may itself be in the form of a hollow spheroid, such as a hollow polymeric sphere. Alternatively, each shell may be empty. The shells may be bonded to the contacts of the microelectronic element before or after engagement to the substrate, as by forming a metallurgical bond, by soldering, brazing, diffusion bonding, eutectic bonding or similar methods. These bonding methods may be performed using bonding materials carried by the shells themselves.
In a method according to a further embodiment of the invention, each conductive element incorporates a soft, electrically conductive material such as a conductive polymer, partially cured or uncured conductive adhesive or the like, extending outside of the shell. Thus, each shell may be in the form of a dome-like cap overlying one end of a soft conductive element. These conductive elements can be engaged with the contacts of the microelectronic elements so that the soft conductive materials bears of the contacts and is bonded thereto, whereas the dome-like shells project away from the microelectronic element. For example, the conductive elements can extend through holes in a dielectric sheet having a first side and a second side, with the soft conductive elements being disposed on the first side and the dome-like shells protruding outwardly from the second side. The entire sheet, with the conductive elements thereon, can be juxtaposed with the microelectronic element so as to engage all of the contacts on the microelectronic element with the conductive elements carried by the sheet simultaneously. Conductive elements incorporating the spheroidal shells discussed above may also be provided within holes of a dielectric sheet. Desirably, each such spheroidal element protrudes beyond each of the first and second surfaces of the sheet, so that numerous spheroidal shells can be engaged with numerous contacts on the microelectronic element simultaneously by juxtaposing the sheet and the microe
Gilleo Kenneth B.
Karavakis Konstantine
Gaffin Jeffrey
Lerner David Littenberg Krumholz & Mentlik LLP
Norris Jeremy
Tessera Inc.
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