Electronic circuit for an active implantable medical device...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S767000, C361S772000, C361S807000, C174S260000, C174S13800J

Reexamination Certificate

active

06256206

ABSTRACT:

FIELD OF THE INVENTION
The present invention concerns electronic circuit technology, more particularly electronic circuits for active implantable medical devices such as cardiac pacemakers and cardiac defibrillators.
BACKGROUND OF THE INVENTION
In these areas, the miniaturization of circuits is an essential parameter. One is often confronted with the difficulty of compromising between, on the one hand, an increase in the number of circuits and the electronic component size to have devices integrating a large number of functions, and, on the other hand, an increase in the miniaturization of the circuit, in a manner that does not encroach on the necessary volume for the battery of the power supply.
Until now, these electronic circuits have been habitually realized on a double face (two sided) substrate supporting, on one side, integrated circuits incorporating the various packaged integrated circuit chips and, on the other side, discrete components, including passive devices, such as capacitors, resistors, etc., and active devices such as diodes, etc.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the present invention to propose a new technology for implementing an electronic circuit to obtain a large reduction in surface area and/or volume requirements, so as to reduce the dimensions of the electronic circuit by a very large proportion.
It is another object of the invention to rationalize a process of circuit manufacture, by allowing notably, a chip placement direct on the substrate, these chips being directly obtained after slicing from a semiconductor wafer, without additional processing or encapsulation (packaging).
Another object of the invention is to increase the integration density of discrete components and increase the routing density of the various electrical interconnections (that is, of the electrical connections from the chip to outside of the micro-circuit), and allow the utilization of the surface area formerly occupied by chips for the addition of supplementary interconnection layers and/or additional components.
Broadly, one aspect of the invention concerns a process for the placement of a micro-circuit chip on a substrate destined to receive this chip, as well as other associated electronic components, to form an electronic circuit. In one embodiment, this process is characterized by the following steps:
a) obtaining a single bare chip carrying on one of its faces at least one electrical contact pad;
b) obtaining a substrate comprising a surface layer, a cavity having a bottom, a depth and an area dimension greater than the corresponding height (thickness) and area dimensions of the chip;
c) installing the chip at or near the bottom of the substrate cavity with at least one contact pad facing or being turned to the exterior;
d) placing on the chip contact pad(s) an electrical connector(s)(so-called electrical connector thread(s)) which are disposed to emerge above the surface level of the substrate;
e) filling the cavity with an isolating resin up to the surface of the substrate, covering the chip and leaving the electrical connection thread(s) exposed;
f) forming an electrical connection between the exposed connection thread(s) and a interconnection layers of the substrate; and
g) placing on the substrate at least one supplementary associated electronic component.
Thus, the electronic circuit is constructed of one or more integrated circuit chips electrically connected to one another and to discrete components using metalization layers and connection threads in the substrate.
According to various advantageous embodiments of the invention, at least one of the supplementary components of step g) is placed above (that is, superimposed over) the buried chip.
Further, in one embodiment, step c) may advantageously comprise bonding (e.g., by glue, paste or otherwise) the chip to the bottom of the cavity, preferably by means of a paste film with a controlled thickness.
In addition, step f) may comprise forming above the chip a plurality of supplementary interconnection layers.
In one embodiment, steps b) to g) are accomplished collectively on a single substrate “plate” supporting a plurality of electronic circuits, and, when completed, are then followed by a step of cutting the substrate to form individual electronic circuits, each in accordance with the present invention.
Another aspect of the invention is directed to a new industrial product, such as an electronic circuit comprising at least one chip, as well as other associated electronic components, placed on a substrate, in which the chip is a bare chip, that is not embedded in a case and not encapsulated, and has on its face, turned to the exterior, electrical contact pads. The chip is buried in the thickness of the substrate, at the bottom of a cavity. The cavity is filled with an isolating resin to the surface level of the substrate, covering the chip except for the connection threads. The connection threads form a connection between the chip contact pads and a conductive interconnection layer of the substrate.


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