Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
1999-06-14
2001-07-03
Lee, Eddie C. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S280000, C257S287000, C257S471000
Reexamination Certificate
active
06255679
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a field effect transistor and a method of manufacturing the same, and more particularly to a field effect transistor which can operate stably at a microwave band including a millimeter wave band, and a method of manufacturing the same.
2. Description of the Related Art
Generally, a field effect transistor with a Schottky gate becomes unstable in the operation at a high frequency. That is, a K factor becomes 1 or below in a millimeter wave band depending on the operation condition of an field effect transistor so that the field effect transistor possibly oscillates. In order to eliminate the operation instability of the field effect transistor in this millimeter wave band, a resistance of several ohms has been conventionally inserted in the series with a gate circuit. In other words, the operation of the field effect transistor becomes unstable because a gate input impedance becomes low in the millimeter wave band. However, by addition of the resistance, a loss is inserted effectively. Therefore, the K factor can be made equal to or more than 1 by the resistance, and the operation stability of the field effect transistor can be attempted.
The resistance to be inserted in the series with the gate circuit is conventionally provided outside the field effect transistor. For this reason, a special space becomes necessary to form the resistance in the field effect transistor. Therefore, in the integrated circuit, this space functions as a bar against the small size of a device. Also, a special photolithography process becomes necessary to form the resistance. Therefore, the number of processes increases to cause the cost up.
In conjunction with the above, a multiple cell type micro wave field effect transistor is described in Japanese Laid Open Patent Application (JP-A-Showa 63-127575). In this reference, a plurality of unit cells are connected in parallel. A gate electrode and a drain electrode in one unit cell are connected with a gate electrode and a drain electrode in an adjacent unit cell via resistance bodies.
Also, a field effect transistor is described in Japanese Laid Open Patent Application (JP-A-Heisei 2-110943). In this reference, a resistance body is provided to connect between gate stripe electrodes or between drain stripe electrodes.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a field effect transistor which has a resistance section for the stable operation without increasing an element area and without increasing the number of processes.
Another object of the present invention is to provide a method of manufacturing a field effect transistor with such a resistance section.
In order to achieve an aspect of the present invention, in a field effect transistor, a compound semiconductor substrate has an active region, and a gate finger electrode is formed on the active region. Source and drain stripe electrodes are formed on the active region to sandwich the gate finger electrode apart from the gate finger electrode. An extended gate electrode is connected with the gate finger electrode and extended source and drain electrodes are connected with the source and drain stripe electrodes, respectively. A resistance section is provided between the gate finger electrode and the extended gate electrode in the transistor forming region.
The resistance section is preferably formed of a gate metal layer which has a Schottky contact with the active region. Also, the gate finger electrode and the extended gate electrode may be formed the gate metal layer and a first metal layer formed on the gate metal layer.
Also, a plurality of gate finger electrodes may extend from a gate bus bar, and the resistance section may be formed between the extended gate electrode and the gate bus bar.
The gate metal layer preferably has a laminate structure of a Schottky material layer having Schottky contact with the active layer and a second metal layer. In this case, the Schottky material layer may be formed of a material selected from the group consisting of W, Ni, Ti, Pt, Mo, and WSi. The gate metal layer preferably includes a barrier layer formed between the Schottky material layer and the second metal layer. In this case, the barrier layer is formed of TiN.
The compound semiconductor substrate may be a GaAs substrate.
In order to achieve another aspect of the present invention, a method of manufacturing a field effect transistor, includes:
forming an element separation insulating film on a semiconductor substrate having a channel layer and a contact layer;
forming a gate structure of a gate finger electrode on the channel layer, and a gate bus bar and an extended gate electrode on the element separation insulating film;
forming a resistance section between the gate bus bar and the extended gate electrode while the gate structure is formed; and
forming a source stripe electrode and a drain stripe electrode on the contact layer to sandwich the gate finger electrode apart from the gate finger electrode.
When the gate structure is formed, a gate metal layer is formed to have Schottky contact with the channel layer. A first metal layer is partially formed on the gate metal layer for the gate finger electrode, the gate bus bar and the extended gate electrode, and the gate metal layer is patterned for the gate finger electrode, the gate bus bar, the resistance section and the extended gate electrode, whereby the resistance section is formed.
The forming the gate metal layer includes: forming a Schottky material layer having Schottky contact with the channel layer; and forming a second metal layer on the Schottky material layer. barrier layer may be formed between the Schottky material layer and the second metal layer.
In order to achieve still another aspect of the present invention, in a field effect transistor, a substrate has an insulating film formed on the substrate and a compound semiconductor channel layer surrounded by the insulating film and a compound semiconductor contact layer formed on the channel layer. A gate metal layer is formed on the channel layer and the insulating film to have a first pattern for a gate finger electrode, a gate bus bar, a resistance section and an extended gate electrode. A first metal layer is formed on the gate metal layer have a second pattern for the gate finger electrode, the gate bus bar, and the extended gate electrode. A second metal layer is formed on the contact layer to sandwich the gate finger electrode apart from the gate finger electrode for a source stripe electrode and a drain stripe electrode.
REFERENCES:
patent: 5567647 (1996-10-01), Takahashi et al.
patent: 5981322 (1999-11-01), Keeth et al.
patent: 6020613 (2000-02-01), Udomoto et al.
patent: 6023086 (2000-02-01), Reyes et al.
patent: 6025614 (2000-02-01), Ogawa et al.
patent: 59-171171 (1984-09-01), None
patent: 60-225478 (1985-11-01), None
patent: 63-127575 (1988-05-01), None
patent: 2-110943 (1990-04-01), None
patent: 4-346467 (1992-12-01), None
patent: 5-275465 (1993-10-01), None
patent: 6-5636 (1994-01-01), None
patent: 6-188379 (1994-07-01), None
patent: 7-235666 (1995-09-01), None
patent: 9-8063 (1997-01-01), None
patent: 9-153499 (1997-06-01), None
Lee Eddie C.
NEC Corporation
Wilson Allan R.
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