Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
1998-02-27
2001-05-29
Zarabian, Amir (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S185280, C365S185290
Reexamination Certificate
active
06240023
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to operations in flash memory devices. More particularly, the present invention relates to a method and apparatus to diminish undesirable programming in a flash memory device.
BACKGROUND
Flash memory devices have proven to be important memory elements in the past several years, and industry pundits predict an ever-increasing role for such devices in the future. A great advantage flash memory devices have over typical EPROM's and EEPROM's are, respectively, system programmability and lower cost.
Despite the many advantages of flash memories over other memories, flash memory devices have several opportunities for improvement. For example, flash memories in their typical implementations suffer from the problems of “overerased memory cells” and “wild cells” which result in all memory cells not behaving exactly alike with respect to their electrical behavior. In fact, many flash memory devices include wide variations of electrical behavior between adjacent memory cells.
Overerased memory cells are particularly undesirable. Overerased memory cells arise when a block of memory cells is erased. Because of the behavioral dissimilarities of the memory cells within the block, one memory cell typically takes longer to erase than other memory cells. As a result, this memory cell defines the erasure time for all memory cells in the block.
Erasing the block for the defined erasure time results in some memory cells being overerased. Overerased memory cells are memory cells that were erased for an excessive period of time. Overerased memory cells have an undesirable large positive charge on their floating gate. For example, an overerased memory cell will have a floating gate voltage of 3V. A non-overerased memory cell will typically have a floating gate voltage of 0.5V . As a result, overerased memory cells operate in the depletion mode. Hence, overerased memory cells conduct current through a bit line to which they are coupled even when the overerased cells are biased with zero drain voltages.
Thus, selected programmed memory cells, coupled to the same bit line as an overerased memory cell, will appear to draw current and appear to be erased. Therefore, data stored in the flash memory devices may not be accurately read. Therefore, overerased memory cells are preferably corrected.
Typically, overerased memory cells are corrected, by applying a gate voltage of 12 volts to the entire block of memory cells. As the floating gate voltage of such memory cells becomes sufficiently lower to come out of depletion mode. With the gate of the overerased cells sufficiently higher than normally erased cells, the control gate couples the floating gate even higher, through a tunneling mechanism in the channel or source area. Electrons are pulled to the floating gate, and lower the voltage of the floating gate. However, during the aforementioned process, since the procedure affects all of the cells in the block, some non-overerased memory cells become undesirably programmed. Therefore, there is a need to correct overerased memory cells while avoiding undesired programming of non-overerased memory cells.
SUMMARY OF THE INVENTION
The present invention provides a method of soft programming a block of memory cells, including the step of measuring current in a bit line of a column in the block. If the measured bit line current exceeds a predetermined level, memory cells coupled to the bit line are sequentially soft programmed for approximately a predetermined period of time so non-overerased memory cells are undisturbed, and until the measured bit line current is less than or equal to a predetermined level.
In one embodiment, if the measured bit line current is less than the predetermined level, the current in a bit line of the next column in the block is measured. In yet another embodiment, the predetermined level is approximately 10 microamps. In yet a further embodiment, the step of sequentially soft programming comprises the step of applying a gate voltage between approximately 6 and 7 volts, and a drain voltage of approximately 5 volts to a memory cell.
The present invention further provides a method of soft programming a block of memory cells including the step of measuring current in a bit line of a column in the block. If the measured bit line current exceeds a predetermined level, memory cells coupled to the bit line are sequentially soft programmed so nonovererased memory cells are undisturbed until the measured bit line current is less than or equal to a predetermined level.
In another embodiment, the present invention provides a method of programming a block of memory cells arranged in rows and columns, including the step of measuring current in a bit line of a column of the block [step (a)]. If the measured bit line current does not exceed a predetermined level, current in a bit line of a next column of the block is measured [step (b)]. If the measured bit line current does exceed a predetermined level, a first memory cell in the column is soft programmed for a predetermined time [step (c)]. Steps (a)-(c) are repeatably performed except that if in step (c) the measured bit line current exceeds the predetermined level, a next memory cell in the column is soft programmed for the predetermined time [step (d)]. If, after step (d), the last memory cell in the column is reached, steps (a)-(d) are repeated a maximum number of times [step (e)].
In one embodiment, the predetermined level is approximately 10 microamperes. In a further embodiment, the predetermined period of time is approximately 10 milliseconds.
In yet a further embodiment, a method of soft programming a block of memory cells includes the step of measuring current in a bit line of a column in the block. If the measured bit line current exceeds a predetermined level, memory cells coupled to the bit line are sequentially soft programmed so non-overerased memory cells are undisturbed. The memory cells are soft programmed until the measured bit line current is less than or equal to a predetermined level.
It is an advantage of the present invention that it permits overerased cells to be soft programmed for a diminished period of time.
REFERENCES:
patent: 5412603 (1995-05-01), Schreck et al.
patent: 5535164 (1996-07-01), Adams et al.
patent: 5568426 (1996-10-01), Roohparvar et al.
patent: 5576992 (1996-11-01), Mehrad
patent: 5600593 (1997-02-01), Fong
patent: 5615159 (1997-03-01), Roohparvar
patent: 5619453 (1997-04-01), Roohparvar et al.
patent: 5627784 (1997-05-01), Roohparvar
patent: 5636166 (1997-06-01), Roohparvar
patent: 5642311 (1997-06-01), Cleveland et al.
patent: 5657268 (1997-08-01), Truong et al.
patent: 5677879 (1997-10-01), Roohparvar et al.
patent: 5680350 (1997-10-01), Lee
patent: 5699298 (1997-12-01), Shiau et al.
patent: 5745410 (1998-04-01), Yiu et al.
patent: 5751944 (1998-05-01), Roohparvar et al.
patent: 5764568 (1998-06-01), Chevallier
patent: 5774400 (1998-06-01), Lancaster et al.
patent: 5781477 (1998-07-01), Rinerson et al.
patent: 5790459 (1998-08-01), Roohparvar
patent: 5801985 (1998-09-01), Roohparvar et al.
patent: 5812452 (1998-09-01), Hoang
patent: 5856944 (1999-01-01), Prickett, Jr. et al.
patent: 5856946 (1999-01-01), Chan et al.
patent: 5890193 (1999-03-01), Chevallier
patent: 5901090 (1999-05-01), Haddad et al.
patent: 5912845 (1999-06-01), Chen et al.
patent: 5930174 (1999-07-01), Chen et al.
patent: 6044015 (2000-03-01), Van Houdt et al.
Micro)n Technology, Inc.
Nguyen Van Thu
Schwegman Lundberg Woessner & Kluth P.A.
Zarabian Amir
LandOfFree
Method for efficiently executing soft programming of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for efficiently executing soft programming of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for efficiently executing soft programming of a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2436860