Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-05-21
2001-08-28
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S057000, C327S088000, C327S089000
Reexamination Certificate
active
06281714
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to receivers and more particularly to differential receivers for use in information processing systems.
2. Description of the Related Art
In computer and information processing systems, various integrated circuit chips must communicate digitally with each other over common buses. The receiving bus nodes recognize the signal as being high or low using receivers, which are also referred to as input buffers. Often the receiver is a differential receiver, i.e. a receiver that detects the difference between two input signals, referred to as the differential inputs. These input signals may be a received signal and a reference voltage or they may be a received signal and the inverse of the received signal. In either case, it is the difference between the two input signals that the receiver detects in order to determine the state of the received signal.
Integrated circuits are powered at certain voltage levels, which levels are then provided to the various components, such as the receivers, which are located on the integrated circuit. However, the nominal supply voltage for integrated circuits keeps being decreased to reduce power consumption. Additionally, fluctuations of the voltage level during operation can make the voltage level powering a receiver even lower. The lower the supply voltage, the more challenging it is to get a receiver to operate reliably.
The signal frequency at which communication occurs can limit the performance of the overall system. Thus the higher the communication frequency, the better. The maximum frequency at which a system communicates is a function not only of the time that it takes for the electromagnetic wavefronts to propagate on the bus from one chip to another, but also of the time required for the signals to be reliably recognized at the receiving bus nodes as being high or low. Characteristics which affect the time in which a signal is recognized by a receiver include the set up time of the receiver, i.e., the amount of time before a clock edge that a signal must arrive and settle to a recognized level, and the hold time of the receiver, i.e., the time after a clock edge that the received signal must stay at a certain level in order for that level to be detected by the receiver. Other characteristics that affect the ability of the receiver to determine that state of the received signal include the ability of the receiver to reject input noise and power supply noise and the ability of the receiver to resolve small voltage differences between the differential inputs of the receiver.
It is desirable to provide a receiver which can receive signals provided by drivers of different types. Examples of types of drivers include High Speed Transmission Logic (HSTL) drivers, Dynamic Termination Logic (DTL) drivers, and Pseudo Emitter Coupled Logic (PECL) drivers.
SUMMARY OF THE INVENTION
It has been discovered that a receiver may be provided which quickly and efficiently recognizes signals by providing the receiver with a resolving circuit which is coupled to a differential current source which converts the signals to currents that produce differential voltages on first and second nodes, the difference in voltage being resolved by the resolving circuit. The differential source is in shunt (not in series) with the resolving circuit. The timing with which the differential source interacts with the resolving circuit is such that the signal to noise ration is maximized.
Such a receiver advantageously operates with low power supply voltage levels, allows a small sampling window, i.e., a small sum of setup time requirement and hold time requirement, and quickly resolves a differential. Other advantages of the invention include reduced power consumption, high speed operation, good rejection of input noise and power supply noise, ability to resolve small (e.g., 1.0 milliVolt) voltage differences, and the ability to function with a variety of types of drivers, including HSTL, DTL and PECL or any other driver type which uses a differential signal.
More specifically, in a preferred embodiment, the invention relates to a differential receiver including a first pair of transistors, a second pair of transistors and a resolving circuit. Each of the first pair of transistors include a drain, a source and a gate, the source of one of the first pair of transistors being coupled to the drain of another of the first pair of transistors, the drain of the one of the first pair of transistors being coupled to a first node, the gate of the one of the first pair of transistors being coupled to an enable signal, and the gate of the another of the first pair of transistors being coupled to a reference voltage. The first pair of transistors provide a current at the first node indicative of the reference voltage when the enable signal is active. Each of the second pair of transistors include a drain, a source and a gate, the source of one of the second pair of transistors being coupled to the drain of another of the second pair of transistors, the drain of the one of the second pair of transistors being coupled to a second node, the gate of the one of the second pair of transistors being coupled to the enable signal, and the gate of the another of the second pair of transistors being coupled to an input signal. The second pair of transistors provide a current at the second node indicative of the voltage of the input signal when the enable signal is active. The resolving circuit is coupled to the first and second nodes. the resolving circuit is grounded by a second clock signal. The resolving circuit resolves which of the first and second nodes has a higher voltage when the second clock signal is grounded.
More specifically, in one embodiment, the invention relates to a differential receiver which includes first and second variable current sources, a resolving circuit and a latching circuit. The first variable current source is coupled between a first node and a first clock signal. The first variable current source is controlled to provide a first current by a reference voltage. The first variable current source causes a voltage to be produced at the first node indicative of the reference voltage. The second variable current source is coupled between a second node and the first clock signal. The second variable current source is controlled to provide a second current by an input signal. The second variable current source causes a voltage to be produced at the second node indicative of the input signal. The resolving circuit is coupled to the first and second nodes. The resolving circuit is controlled by a second clock signal. The resolving circuit resolves which of the first and second nodes has a higher voltage when the second clock signal is active. The latching circuit is coupled to the first node and receives input from the resolving circuit and provides an output signal.
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Ang Michael A.
Starr Jonathan E.
Lam Tuan T.
Skyjerven Morrill MacPherson LLP
Sun Microsystems Inc.
Terrile Stephen A.
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