Interrupt control system for microprocessor for handling a plura

Details Interrupt control system for microprocessor for handling a plura Interrupt control system for microprocessor for handling a plura

1992-09-08

1994-09-20

Ray, Gopal C.

Boots, shoes, and leggings

3642808, 3642412, 3642416, 364259, 3642592, 3642513, 364DIG1, G06F 946

Patent

active

053496671

ABSTRACT:
A microcomputer includes a maskable interrupt request terminal, a maskable interrupt request terminal, and a nonmaskable interrupt request terminal, and internally contains a status register having a group of flags indicating a maskable interrupt allowing level, a flag indicating that a nonmaskable interrupt processing is under execution, a flag indicating that an exception processing is under execution, and a flag indicating inhibition of the maskable interrupt. There are also internally provided first and second save registers for saving the content of the status register and the content of a program counter, respectively, when the maskable interrupt request is acknowledged, and third and fourth save registers for saving the content of the status register and the content of a program counter, respectively, when the nonmaskable interrupt request is acknowledged. A register is provided to independently indicate the acknowledgement of the maskable interrupt and the acknowledgement of the nonmaskable interrupt, and a comparator compares the level designated by the maskable interrupt allowing level indicating flag group with an interrupt request level notified through the maskable interrupt request level terminal.

REFERENCES:
patent: 4023143 (1977-05-01), Braunstein
patent: 4200912 (1980-04-01), Harrington et al.
patent: 4349872 (1982-09-01), Fukasawa et al.
patent: 4349873 (1982-09-01), Gunter et al.
patent: 4631659 (1986-12-01), Hayn, II et al.
patent: 4648029 (1987-03-01), Cooper et al.
patent: 4924382 (1990-05-01), Shouda
patent: 4972312 (1990-11-01), den Boef

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