Patent
1989-05-30
1991-05-21
Prenty, Mark
357 42, 357 34, 357 53, 357 2311, H01L 2702, H01L 2972, H01L 2940, H01L 2906
Patent
active
050179969
ABSTRACT:
This invention relates to a BiMOS IC, such as BiCMOS IC, and production method thereof. The present invention forms an impurity layer for preventing field concentration in a bipolar transistor by the same or a different process step than that for forming a diffusion layer of a MOS FET (such as a p-layer for the channel stopper), in order to improve the breakdown voltage of the bipolar transistor (such as a p-layer as the base of a bipolar npn transistor) of a BiMOS IC having the bipolar transistor and MOS FET formed on the same semiconductor substrate. Thus, the invention can provide a BiMOS IC having an improved breakdown voltage of the bipolar semiconductor device portion without drastically changing the production process of the BiMOS IC.
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Nikkei Electronics, Jun. 20, 1983, pp. 179-207; published by Nikkei-McGraw-Hill Co.
IBM Technical Disclosure Bulletin; vol. 28, #9, pp. 3813-3815, Feb. 1986.
Hitachi , Ltd.
Prenty Mark
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