LFSR implementation using split-table lookup

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364578, 377 72, G06F 1900

Patent

active

059464739

ABSTRACT:
A linear feedback shift register (LFSR) of interest is modelled in software by replicating the LFSR in at least two identically configured model LFSRs. One model LFSR contains only the higher order initial bits of the LFSR of interest, with zeroes in the lower order bit positions, and the other model LFSR has only the lower order bits, with zeroes in the higher order bit positions. The model LFSRs are represented by respective tables of model LFSR output values that would be produced after a predetermined number of register shifts. The tables are accessed based on the initial value of the LFSR of interest, and the results of one table are combined with the results of the other table using an exclusive OR operator to thereby determine the output of the LFSR of interest. The table lookup method results in increased speed vis-a-vis the performance of single-bit-per-cycle LFSRs, while the use of two logical model LFSRs with corresponding tables permits duplicative entries to be ignored when indexing the tables, thus greatly reducing the space required to store the tables.

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"Byte-wise CRC Calculations", Aram Perez, Wismer & Becker, IEEE Micro, pp. 40-50, Jun. 1983.

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