1989-05-01
1991-05-21
James, Andrew J.
357 4, 357 20, 357 237, 357 2311, 357 41, 357 48, H01L 2702, H01L 2701, H01L 2712
Patent
active
050179942
ABSTRACT:
A semiconductor circuit has a power source terminal set at a positive potential, a reference potential terminal set at a reference potential, a first MOS transistor whose current path is connected between the power source terminal and an output terminal, and a second MOS transistor whose current path is connected between the output terminal and the reference potential terminal. The gates of the first and second MOS transistors are commonly connected to an input terminal. The first and second MOS transistors are respectively n- and p-channel MOS transistors.
REFERENCES:
patent: 4231055 (1980-10-01), Iizuka
patent: 4282556 (1981-08-01), Ipri
patent: 4384300 (1983-05-01), Iizuka
patent: 4395726 (1983-07-01), Maeguchi
patent: 4399519 (1983-08-01), Masuda et al.
patent: 4555721 (1985-11-01), Bansal et al.
patent: 4883986 (1989-11-01), Egawa et al.
Egawa Hideharu
Suzuki Yasoji
James Andrew J.
Ngo Ngan Van
Tokyo Shibaura Denki Kabushiki Kaisha
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